MCF5282CVM66 Freescale, MCF5282CVM66 Datasheet - Page 529

• Manufacturer Part Number: MCF5282CVM66
• Manufacturer: Freescale

Specifications of MCF5282CVM66

• Cpu Family: MCF528x
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Interface Type: CAN/I2C/QSPI/UART
• Total Internal Ram Size: 64KB
• # I/os (max): 150
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 3.3V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 256
• Package Type: MA-BGA
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

Chapter 27
Chip Configuration Module (CCM)
The chip configuration module (CCM) controls the chip configuration and operating mode.
27.1
The CCM performs these operations.
27.2
The CCM configures the chip for two modes of operation:
The operating mode is determined at reset and cannot be changed thereafter.
27.2.1
In master mode, the central processor unit (CPU) can access external memories and peripherals. The
external bus consists of a 32-bit data bus and 24 address lines. The available bus control signals include
R/W, TS, TIP, TSIZ[1:0], TA, TEA, OE, and BS[3:0]. Up to seven chip selects can be programmed to
select and control external devices and to provide bus cycle termination. When interfacing to 16-bit ports,
the port C and D pins and PJ[5:4] (BS[1:0]) can be configured as general-purpose input/output (I/O), and
when interfacing to 8-bit ports, the ports B, C and D pins and PJ[7:5] (BS[3:1]) can be configured as
general purpose input/output (I/O).
27.2.2
In single-chip mode, all memory is internal to the chip. All external bus pins are configured as general
purpose I/O.
Freescale Semiconductor
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Selects the chip operating mode:
— Master mode
— Single-chip mode
Selects external clock or phase-lock loop (PLL) mode with internal or external reference
Selects output pad drive strength
Selects boot device and data port size
Selects bus monitor configuration
Selects low-power configuration
Selects transfer size function of the external bus
Selects processor status (PSTAT) and processor debug data (DDATA) functions
Selects BDM or JTAG mode
Master mode
Single-chip mode
Features
Modes of Operation
Master Mode
Single-Chip Mode
27-1