MCF5282CVM66 Freescale, MCF5282CVM66 Datasheet - Page 751

• Manufacturer Part Number: MCF5282CVM66
• Manufacturer: Freescale

Specifications of MCF5282CVM66

• Cpu Family: MCF528x
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Interface Type: CAN/I2C/QSPI/UART
• Total Internal Ram Size: 64KB
• # I/os (max): 150
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 3.3V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 256
• Package Type: MA-BGA
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

Collision handling 17-42
Core
Cyclic redundancy check error (CRCERR) bit 25-26
D
DC characteristics 33-3
Debug
Freescale Semiconductor
registers
reset 6-23
security
block diagram 2-1
low-power modes 7-6
registers
see BDM
breakpoint
data 30-39
electrical characteristics
emulator mode 30-38
interrupt 30-37
low-power modes 7-13
operation 30-37
overview 30-1
processor status 30-2
programming model 30-5
registers
reads 6-17
setting CFMCLKD 6-17
stop mode 6-21
verify 6-18
writes 6-17
clock divider (CFMCLKD) 6-9
command (CFMCMD) 6-16
configuration (CFMCR) 6-8
data access (CFMDACC) 6-14
FLASHBAR 6-5
protection (CFMPROT) 6-12
security (CFMSEC) 6-10
supervisor access (CFMSACC) 6-13
user status (CFMUSTAT) 6-15
back door access 6-23
erase verify check 6-23
address (An) 2-4
condition code (CCR) 2-6
data (Dn) 2-4
program counter (PC) 2-7
stack pointer (A7) 2-5
status register (SR) 2-8
vector base (VBR) 2-7
functions 30-7
operation 30-37
AC timing specifications 33-27
setting 6-17
,
30-39
Debug interrupt 30-37
DMA controller
DMA timers
Doze mode 7-6
E
Electrical characteristics
support, real-time 30-37
taken branch 30-4
trace, real-time 30-2
channel prioritization 16-12
data transfer
functional description 16-11
low-power modes 7-7
overview 16-1
programming 16-12
registers
signal diagram 16-1
electrical characteristics
operation
bus
ColdFire Flash module
DC specifications 33-3
debug AC timing specifications 33-27
DMA timer AC timing specifications 33-24
FEC AC timing specifications 33-21
GPIO timing 33-18
I
2
C input timing between SCL and SDA 33-20
address attribute trigger (AATR) 30-7
address breakpoint (ABLR, ABHR) 30-9
configuration/status (CSR) 30-10
data breakpoint/mask (DBR, DBMR) 30-12
program counter breakpoint/mask (PBR, PBMR) 30-13
trigger definition (TDR) 30-14
auto alignment 16-13
bandwidth control 16-14
dual-address 16-12
overview 16-4
requests 16-11
termination 16-14
byte count (BCRn) 16-7
control (DCRn) 16-7
destination address (DARn) 16-6
request control (DMAREQC) 16-2
source address (SARn) 16-5
status (DSRn) 16-10
AC timing specifications 33-24
low-power modes 7-8
external output timing specifications 33-12
processor input timing specifications 33-11
module life characteristics 33-11
program and erase characteristics 33-10
Index-3