MCF5282CVM66 Freescale, MCF5282CVM66 Datasheet - Page 341

• Manufacturer Part Number: MCF5282CVM66
• Manufacturer: Freescale

Specifications of MCF5282CVM66

• Cpu Family: MCF528x
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Interface Type: CAN/I2C/QSPI/UART
• Total Internal Ram Size: 64KB
• # I/os (max): 150
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 3.3V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 256
• Package Type: MA-BGA
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

Other registers reset when the ECR[ETHER_EN] bit is cleared (which is accomplished by a hard reset or
software to halt operation). By clearing ECR[ETHER_EN], configuration control registers such as the
TCR and RCR are not reset, but the entire data path is reset.
17.5.3
You need to initialize portions the FEC prior to setting the ECR[ETHER_EN] bit. The exact values depend
on the particular application. The sequence is not important.
Table 17-32
Table 17-33
Freescale Semiconductor
User Initialization (Prior to Setting ECR[ETHER_EN])
defines Ethernet MAC registers requiring initialization.
defines FEC FIFO/DMA registers that require initialization.
Table 17-33. FEC User Initialization (Before ECR[ETHER_EN])
Descriptor Controller block
Table 17-31. ECR[ETHER_EN] De-Assertion Effect on FEC
Table 17-32. User Initialization (Before ECR[ETHER_EN])
Register/Machine
RECV block
XMIT block
DMA block
PALR / PAUR (only needed for full duplex flow control)
RDAR
TDAR
OPD (only needed for full duplex flow control)
Clear EIR (write 0xFFFF_FFFF)
Initialize FRSR (optional)
Initialize EMRBR
TFWR (optional)
MSCR (optional)
Initialize ERDSR
Initialize ETDSR
Clear MIB_RAM
Initialize EIMR
GAUR / GALR
Description
Description
IALR / IAUR
RCR
TCR
Transmission is aborted (bad CRC
All DMA activity is terminated
Receive activity is aborted
Halt operation
Reset Value
appended)
Cleared
Cleared
Fast Ethernet Controller (FEC)
17-31