MCF5282CVM66 Freescale, MCF5282CVM66 Datasheet - Page 247

MCF5282CVM66

Manufacturer Part Number
MCF5282CVM66
Description
Manufacturer
Freescale
Datasheet

Specifications of MCF5282CVM66

Cpu Family
MCF528x
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
66MHz
Interface Type
CAN/I2C/QSPI/UART
Total Internal Ram Size
64KB
# I/os (max)
150
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
3.3V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
256
Package Type
MA-BGA
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant

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Table 14-2
Freescale Semiconductor
Development serial
input/Test data
Development serial
output/Test data
Test clock
Debug data
Processor status
outputs
Test
QADC analog reference VRH, VRL
QADC analog supply
PLL analog supply
QADC positive supply
Flash erase/program
power
Flash array power
and ground
Standby power
Positive supply
Ground
lists signals in alphabetical order by abbreviated name.
Signal Name
Table 14-1. MCF5282 Signal Description (continued)
DSI/TDI
DSO/TDO
TCLK
DDATA[3:0]
PST[3:0]
TEST
VDDA, VSSA
VDDPLL, VSSPLL Isolate the PLL analog circuitry from
VDDH
VPP
VDDF, VSSF
VSTBY
VDD
VSS
Abbreviation
Power and Reference Signals
JTAG test logic clock.
Supplies positive power to the ESD
Supplies positive power to the core
Provides single-bit communication for
debug module commands (DSI).
Provides serial data port for loading
JTAG boundary scan, bypass, and
instruction registers (TDI).
Provides single-bit communication for
debug module responses (DSO).
Provides serial data port for outputting
JTAG logic data (TDO).
Display captured processor
addresses, data, and breakpoint
status.
Indicate core status.
Test Signals
Reserved, should be connected to
VSS.
High (VRH) and low (VRL) reference
potentials for the analog converter.
Isolate the QADC analog circuitry from
digital power supply noise.
digital power supply noise.
structures in the QADC pads.
Used for Flash stress testing.
Supply power and ground to Flash
array.
Provides standby voltage to RAM array
if VDD is lost.
logic and I/O pads.
Negative supply.
Function
Ground
I/O
O
O
O
I
I
I
I
I
I
I
I
I
I
Signal Descriptions
14-30
14-30
14-30
14-31
14-31
14-31
14-32
14-32
14-32
14-32
14-32
14-32
14-32
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Page
14-7

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