EP3SL150F780I3N Altera, EP3SL150F780I3N Datasheet - Page 56

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EP3SL150F780I3N

Manufacturer Part Number
EP3SL150F780I3N
Description
Stratix III
Manufacturer
Altera
Datasheet

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Adaptive Logic Modules
Figure 2–18. Shared Arithmetic Chain, Carry Chain, and Register Chain Interconnects
2–22
Stratix III Device Handbook, Volume 1
f
routing to adjacent ALM
Carry chain & shared
ALM Interconnects
There are three dedicated paths between ALMs: Register Cascade,
Carry-chain, and Shared Arithmetic chain. Stratix III devices include an
enhanced interconnect structure in LABs for routing shared arithmetic
chains and carry chains for efficient arithmetic functions. The register
chain connection allows the register output of one ALM to connect
directly to the register input of the next ALM in the LAB for fast shift
registers. These ALM-to-ALM connections bypass the local interconnect.
The Quartus II Compiler automatically takes advantage of these
resources to improve utilization and performance.
shared arithmetic chain, carry chain, and register chain interconnects.
Refer to the
volume 1 of the Stratix III Device Handbook for information on routing
between LABs.
arithmetic chain
interconnect
Local
MultiTrack Interconnect in Stratix III Devices
Local interconnect
routing among ALMs
in the LAB
ALM 10
ALM 1
ALM 2
ALM 3
ALM 4
ALM 5
ALM 6
ALM 7
ALM 8
ALM 9
Register chain
routing to adjacent
ALM's register input
Figure 2–18
Altera Corporation
chapter in
October 2007
shows the

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