EP3SL150F780I3N Altera, EP3SL150F780I3N Datasheet - Page 472

• Manufacturer Part Number: EP3SL150F780I3N
• Description: Stratix III
• Manufacturer: Altera

Supported Configuration Schemes
14–8
Stratix III Device Handbook, Volume 1
Note to
(1)
Secure in tamper
resistant mode using
non-volatile key with
tamper protection set
Table 14–3. Allowed Configuration Modes for Various Security Modes
Security Mode
There is no impact to the configuration time required compared to unencrypted configuration modes except fast
passive parallel with AES (and/or decompression) which requires DCLK of 4× the data rate.
Figure
14–3:
Configuration
Encrypted
File
1
Table 14–4
design security feature both for volatile key and non-volatile key
programming.
You can use the design security feature with other configuration features,
such as compression and remote system upgrade features. When you use
compression with the design security feature, the configuration file is first
Note to
(1)
FPP
Fast AS
PS
JTAG
Table 14–4. Design Security Configuration Schemes Availability
Configuration Scheme
In this mode, the host system must send a DCLK that is 4× the data rate.
Table
The design security feature is available in all configuration
methods, except in JTAG. Therefore, you can use the design
security feature in FPP mode (when using external controller,
such as a MAX II device or a microprocessor and a flash
memory), or in fast AS and PS configuration schemes.
●
●
●
●
summarizes the configuration schemes that support the
Passive serial with AES (and/or with decompression)
Fast passive parallel with AES (and/or with decompression)
Remote update fast AS with AES (and/or with decompression)
Fast AS (and/or with decompression)
14–4:
MAX II device or microprocessor
and flash memory
Enhanced configuration device
Serial configuration device
MAX II device or microprocessor
and flash memory
Download cable
MAX II device or microprocessor
and flash memory
Download cable
Allowed Configuration Modes
Configuration Method
Note (1)
(Part 2 of 2)
Altera Corporation
Design Security
October 2007
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