EP3SL150F780I3N Altera, EP3SL150F780I3N Datasheet - Page 402

• Manufacturer Part Number: EP3SL150F780I3N
• Description: Stratix III
• Manufacturer: Altera

Passive Serial Configuration
Figure 11–18. Multi-Device PS Configuration using a USB Blaster, MasterBlaster, ByteBlaster II or
ByteBlasterMV Cable
Notes to
(1)
(2)
(3)
11–42
Stratix III Device Handbook, Volume 1
You should connect the pull-up resistor to the same supply voltage as the USB Blaster, MasterBlaster (V
ByteBlaster II, or ByteBlasterMV cable.
You only need the pull-up resistors on DATA0 and DCLK if the download cable is the only configuration scheme used
on your board. This is to ensure that DATA0 and DCLK are not left floating after configuration. For example, if you
are also using a configuration device, you do not need the pull-up resistors on DATA0 and DCLK.
Pin 6 of the header is a V
V
ByteBlasterMV cable, this pin is a no connect. In the USB Blaster and ByteBlaster II cables, this pin is connected to
nCE when it is used for active serial programming, otherwise it is a no connect.
CCIO
10 kΩ
Figure
. Refer to the
V
CC
10 kΩ
(1)
11–18:
V
f
CC
(2)
(1)
MasterBlaster Serial/USB Communications Cable Data Sheet
V CCPGM
V CCPGM
GND
IO
GND
GND
reference voltage for the MasterBlaster output driver. V
For more information on how to use the USB Blaster, MasterBlaster,
ByteBlaster II, or ByteBlasterMV cables, refer to the following data
sheets:
■
■
■
■
MSEL2
MSEL1
MSEL0
Stratix III Device 1
MSEL2
MSEL1
MSEL0
DATA0
nCONFIG
nCONFIG
nCE
nCE
Stratix III Device 2
DATA0
USB Blaster USB Port Download Cable Data Sheet
MasterBlaster Serial/USB Communications Cable Data Sheet
ByteBlaster II Parallel Port Download Cable Data Sheet
ByteBlasterMV Parallel Port Download Cable Data Sheet
CONF_DONE
CONF_DONE
nSTATUS
nSTATUS
DCLK
nCEO
nCEO
DCLK
10 kΩ
N.C.
V
CC
10 kΩ
(1)
V
CC
(1)
10 kΩ
V
CC
(2)
(1)
IO
should match the device's
for this value. In the
10-Pin Male Header
Pin 1
Download Cable
(PS Mode)
Altera Corporation
GND
November 2007
V
CC
V
GND
IO
IO
(3)
pin),