EP3SL150F780I3N Altera, EP3SL150F780I3N Datasheet - Page 30

• Manufacturer Part Number: EP3SL150F780I3N
• Description: Stratix III
• Manufacturer: Altera

Architecture Features
1–12
Stratix III Device Handbook, Volume 1
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Remote System Upgrades
Stratix III devices feature remote system upgrade capability, allowing
error-free deployment of system upgrades from a remote location
securely and reliably. Soft logic (either the Nios embedded processor or
user logic) implemented in a Stratix III device can download a new
configuration image from a remote location, store it in configuration
memory, and direct the dedicated remote system upgrade circuitry to
initiate a reconfiguration cycle. The dedicated circuitry performs error
detection during and after the configuration process, and can recover
from an error condition by reverting back to a safe configuration image,
and provides error status information. This dedicated remote system
upgrade circuitry is unique to Stratix series FPGAs and helps to avoid
system downtime.
For more information refer to the
Devices
IEEE 1149.1 (JTAG) Boundary Scan Testing
Stratix III devices support the JTAG IEEE Std. 1149.1 specification. The
Boundary-Scan Test (BST) architecture offers the capability to test pin
connections without using physical test probes and capture functional
data while a device is operating normally. Boundary-scan cells in the
Stratix III device can force signals onto pins or capture data from pin or
logic array signals. Forced test data is serially shifted into the
boundary-scan cells. Captured data is serially shifted out and externally
compared to expected results. In addition to BST, you can use the IEEE
Std. 1149.1 controller for Stratix III device in-circuit reconfiguration (ICR).
For more information refer to the
Testing in Stratix III Devices
Handbook.
Design Security
Stratix III devices are the only high-density, high-performance FPGAs
with support for 256-bit volatile and non-volatile security keys to protect
designs against copying, reverse engineering, and tampering. Stratix III
devices have the ability to decrypt a configuration bitstream using the
Advanced Encryption Standard (AES) algorithm, an industry standard
encryption algorithm that is FIPS-197 certified and requires a 256-bit
security key.
chapter in volume 1 of the Stratix III Device Handbook.
chapter in volume 1 of the Stratix III Device
Remote System Upgrades with Stratix III
IEEE 1149.1 (JTAG) Boundary Scan
Altera Corporation
November 2007