EP3SL150F780I3N Altera, EP3SL150F780I3N Datasheet - Page 559
EP3SL150F780I3N
Manufacturer Part Number
EP3SL150F780I3N
Description
Stratix III
Manufacturer
Altera
Datasheet
1.EP3SL110.pdf
(904 pages)
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Altera Corporation
November 2007
DIFFERENTIAL 2.5-V
SSTL CLASS I
DIFFERENTIAL 2.5-V
SSTL CLASS II
3.3-V LVTTL
3.3-V LVCMOS
3.0-V LVTTL
3.0-V LVCMOS
2.5 V
1.8 V
1.5 V
1.2 V
SSTL-2 CLASS I
SSTL-2 CLASS II
SSTL-18 CLASS I
SSTL-18 CLASS II
SSTL-15 CLASS I
SSTL-15 CLASS II
1.8-V HSTL CLASS I
1.8-V HSTL CLASS II
1.5-V HSTL CLASS I
1.5-V HSTL CLASS II
1.2-V HSTL CLASS I
1.2-V HSTL CLASS II
Table 1–40. Maximum Output Toggle Rate on Stratix III Devices for Row I/O Pins (Part 5 of 5)
Table 1–41. Maximum Input Toggle Rate on Stratix III Devices for Dedicated Clock Input Pins (Part 1 of 2)
I/O Standard
I/O Standard
OCT 50 Ω
OCT 25 Ω
Strength
VCCL=1.1V
Current
Setting
or OCT
Table 1–41
Table 1–42
clock pins.
500
500
500
500
500
500
500
500
500
500
500
500
500
500
500
500
500
500
500
500
-2
VCCL=1.1V VCCL=1.1V VCCL=1.1V VCCL=1.1V VCCL=0.9V
specifies the maximum input toggle rates for clock pins.
specifies the maximum output toggle rates at 0pF load for
VCCL=1.1V
666
350
Stratix III Device Datasheet: DC and Switching Characteristics
-2
429
429
429
429
429
429
429
429
429
429
429
429
429
429
429
429
429
429
429
429
-3
VCCL=1.1V
572
300
-3
368
368
368
368
368
368
368
368
368
368
368
368
368
368
368
368
368
368
368
368
-4
Stratix III Device Handbook, Volume 2
490
257
VCCL=1.1V
-4
397
397
397
397
397
397
397
397
397
397
397
397
397
397
397
397
397
397
397
397
-4L
529
278
-4L
VCCL=0.9V
397
397
397
397
397
397
397
397
397
397
397
397
397
397
397
397
397
397
397
397
-4L
529
278
-4L
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
Units
1–47
MHz
MHz
Units
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