EP3SL150F780I3N Altera, EP3SL150F780I3N Datasheet - Page 432

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EP3SL150F780I3N

Manufacturer Part Number
EP3SL150F780I3N
Description
Stratix III
Manufacturer
Altera
Datasheet

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Dedicated Remote System Upgrade Circuitry
12–10
Stratix III Device Handbook, Volume 1
Shift register
Control register
Update register
Status register
Table 12–2. Remote System Upgrade Registers
Register
This register is accessible by the logic array and allows the update, status, and control
registers to be written and sampled by user logic. Write access is enabled in remote update
mode for factory configurations to allow writes to the update register.
This register contains the current page address, the user watchdog timer settings, and one
bit specifying whether the current configuration is a factory configuration or an application
configuration. During a read operation in an application configuration, this register is read
into the shift register. When a reconfiguration cycle is initiated, the contents of the update
register are written into the control register.
This register contains data similar to that in the control register. However, it can only be
updated by the factory configuration by shifting data into the shift register and issuing an
update operation. When a reconfiguration cycle is triggered by the factory configuration, the
control register is updated with the contents of the update register. During a capture in a
factory configuration, this register is read into the shift register.
This register is written to by the remote system upgrade circuitry on every reconfiguration to
record the cause of the reconfiguration. This information is used by the factory configuration
to determine the appropriate action following a reconfiguration. During a capture cycle, this
register is read into the shift register.
Remote System Upgrade Registers
The remote system upgrade block contains a series of registers that store
the page addresses, watchdog timer settings, and status information.
These registers are detailed in
The remote system upgrade control and status registers are clocked by
the 10-MHz internal oscillator (the same oscillator that controls the user
watchdog timer). However, the remote system upgrade shift and update
registers are clocked by the user clock input (RU_CLK).
Remote System Upgrade Control Register
The remote system upgrade control register stores the application
configuration page address and user watchdog timer settings. The
control register functionality depends on the remote system upgrade
mode selection. In remote update mode, the control register page address
bits are set to all zeros (24'b0 = 0×000000) at power up in order to load
the factory configuration. A factory configuration in remote update mode
has write access to this register.
The control register bit positions are shown in
Table
within a register. For example, bit number 8 is the enable bit for the
watchdog timer.
12–3. In the figure, the numbers show the bit position of a setting
Description
Table
12–2.
Figure 12–6
Altera Corporation
and defined in
October 2007

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