HD6417750SBP200 Renesas Electronics America, HD6417750SBP200 Datasheet - Page 950

• Manufacturer Part Number: HD6417750SBP200
• Description: IC SUPERH MPU ROMLESS 256BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750SBP200

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 2.07 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 20 User Break Controller (UBC)
20.3
20.3.1
An instruction access is an access that obtains an instruction. An operand access is any memory
access for the purpose of instruction execution. For example, the access to address PC+disp×2+4
in the instruction MOV.W @(disp,PC), Rn (an access very close to the program counter) is an
operand access. The fetching of an instruction from the branch destination when a branch
instruction is executed is also an instruction access. As the term “data” is used to distinguish data
from an address, the term “operand access” is used in this section.
In this LSI, all operand accesses are treated as either read accesses or write accesses. The
following instructions require special attention:
• PREF, OCBP, and OCBWB instructions: Treated as read accesses.
• MOVCA.L and OCBI instructions: Treated as write accesses.
• TAS.B instruction: Treated as one read access and one write access.
The operand accesses for the PREF, OCBP, OCBWB, and OCBI instructions are accesses with no
access data.
This LSI handles all operand accesses as having a data size. The data size can be byte, word,
longword, or quadword. The operand data size for the PREF, OCBP, OCBWB, MOVCA.L, and
OCBI instructions is treated as longword.
20.3.2
In this section, “1 (2, 3, ...) instruction(s) after...”, as a measure of the distance between two
instructions, is defined as follows. A branch is counted as an interval of two instructions.
• Example of sequence of instructions with no branch:
Rev.7.00 Oct. 10, 2008 Page 864 of 1074
REJ09B0366-0700
100
102
104
106
Operation
Explanation of Terms Relating to Accesses
Explanation of Terms Relating to Instruction Intervals
Instruction A (0 instructions after instruction A)
Instruction B (1 instruction after instruction A)
Instruction C (2 instructions after instruction A)
Instruction D (3 instructions after instruction A)