HD6417750SBP200 Renesas Electronics America, HD6417750SBP200 Datasheet - Page 89

IC SUPERH MPU ROMLESS 256BGA

HD6417750SBP200

Manufacturer Part Number
HD6417750SBP200
Description
IC SUPERH MPU ROMLESS 256BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417750SBP200

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
28
Program Memory Type
ROMless
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 2.07 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417750SBP200
Manufacturer:
HITACHI
0
Part Number:
HD6417750SBP200
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Item
FPU
Features
On-chip floating-point coprocessor
Supports single-precision (32 bits) and double-precision (64 bits)
Supports IEEE754-compliant data types and exceptions
Two rounding modes: Round to Nearest and Round to Zero
Handling of denormalized numbers: Truncation to zero or interrupt
generation for compliance with IEEE754
Floating-point registers: 32 bits × 16 × 2 banks
(single-precision 32 bits × 16 or double-precision 64 bits × 8) × 2 banks
32-bit CPU-FPU floating-point communication register (FPUL)
Supports FMAC (multiply-and-accumulate) instruction
Supports FDIV (divide) and FSQRT (square root) instructions
Supports FLDI0/FLDI1 (load constant 0/1) instructions
Instruction execution times
⎯ Latency (FMAC/FADD/FSUB/FMUL): 3 cycles (single-precision), 8
⎯ Pitch (FMAC/FADD/FSUB/FMUL): 1 cycle (single-precision), 6 cycles
Note: FMAC is supported for single-precision only.
3-D graphics instructions (single-precision only):
⎯ 4-dimensional vector conversion and matrix operations (FTRV): 4
⎯ 4-dimensional vector inner product (FIPR): 1 cycle (pitch), 4 cycles
cycles (double-precision)
(double-precision)
cycles (pitch), 7 cycles (latency)
(latency)
Rev.7.00 Oct. 10, 2008 Page 3 of 1074
Section 1 Overview
REJ09B0366-0700

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