HD6417750SBP200 Renesas Electronics America, HD6417750SBP200 Datasheet - Page 860

IC SUPERH MPU ROMLESS 256BGA

HD6417750SBP200

Manufacturer Part Number
HD6417750SBP200
Description
IC SUPERH MPU ROMLESS 256BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417750SBP200

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
28
Program Memory Type
ROMless
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 2.07 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417750SBP200
Manufacturer:
HITACHI
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Part Number:
HD6417750SBP200
Manufacturer:
RENESAS/瑞萨
Quantity:
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Section 16 Serial Communication Interface with FIFO (SCIF)
Rev.7.00 Oct. 10, 2008 Page 774 of 1074
REJ09B0366-0700
No
Framing error occurrence
Overrun error handling
framing error handling
in SCFSR2 set to 1?
in SCFDR2 = H'10?
Read receive FIFO
PER or FER bit
Bits 7 to 0
Last data?
+
Yes
Yes
No
Figure 16.14 Overrun Error Flag
No
Yes
Normal error handling
Error handling
Flow chart:
When flaming error (SCFSR.ER=1) is occurred, bit7 to
bit0 should be read out from SCFDR2. If bit7 to bit0
equals H'10, contents of the receive FIFO should be
read. When the data received last is not accompanied
with flaming error (SCFSR2.FER=0) both overrun error
handling and flaming error handling shoud be
conducted.

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