HD6417750SBP200 Renesas Electronics America, HD6417750SBP200 Datasheet - Page 922

• Manufacturer Part Number: HD6417750SBP200
• Description: IC SUPERH MPU ROMLESS 256BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750SBP200

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 2.07 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 19 Interrupt Controller (INTC)
IPRD (SH7750S and SH7750R only)
Table 19.6 shows the relationship between the interrupt request sources and the IPRA–IPRD
register bits.
Table 19.6 Interrupt Request Sources and IPRA–IPRD Registers
Register
Interrupt priority register A
Interrupt priority register B
Interrupt priority register C
Interrupt priority register D *
Notes: 1. REF is the memory refresh unit in the bus state controller (BSC). See section 13, Bus
As shown in table 19.6, four on-chip peripheral modules are assigned to each register. Interrupt
priority levels are established by setting a value from H'F (1111) to H'0 (0000) in each of the four-
bit groups: 15–12, 11–8, 7–4, and 3–0. Setting H'F designates priority level 15 (the highest level),
and setting H'0 designates priority level 0 (requests are masked).
Rev.7.00 Oct. 10, 2008 Page 836 of 1074
REJ09B0366-0700
Initial value:
Initial value:
2. Reserved bits: These bits are always read as 0 and should always be written with 0.
3. SH7750S and SH7750R only
R/W:
R/W:
Bit:
Bit:
State Controller (BSC), for details.
R/W
R/W
15
1
7
0
3
R/W
R/W
14
1
6
1
15–12
TMU0
WDT
GPIO
IRL0
R/W
R/W
13
0
5
1
R/W
R/W
12
1
4
1
11–8
TMU1
REF *
DMAC
IRL1
1
R/W
R/W
11
1
3
0
Bits
7–4
TMU2
SCI
SCIF
IRL2
R/W
R/W
10
0
2
1
R/W
R/W
3–0
Reserved *
H-UDI
IRL3
9
1
1
0
RTC
R/W
R/W
8
0
0
0
2