ATTINY167-15XD Atmel, ATTINY167-15XD Datasheet - Page 26

• Manufacturer Part Number: ATTINY167-15XD
• Description: MCU AVR 16K FLASH 15MHZ 20-TSSOP
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY167-15XD

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 150°C
• Package / Case: 20-TSSOP
• Processor Series: ATTINY1x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.2.1
4.2.2
26
ATtiny87/ATtiny167
Default Clock Source
Calibrated Internal RC Oscillator
The various choices for each clocking option are given in the following sections.
When the CPU wakes up from Power-down or Power-save, or when a new clock source is
enabled by the dynamic clock switch circuit, the selected clock source is used to time the
start-up, ensuring stable oscillator operation before instruction execution starts.
When the CPU starts from reset, there is an additional delay allowing the power to reach a sta-
ble level before commencing normal operation. The Watchdog Oscillator is used for timing this
real-time part of the start-up sequence. The number of WDT Oscillator cycles used for each
time-out is shown in
Table 4-2.
At reset, the CKSEL and SUT fuse settings are copied into the CLKSELR register. The device
will then use the clock source and the start-up timings defined by the CLKSELR bits
(CSEL3..0 and CSUT1:0).
The device is shipped with CKSEL Fuses = 0010
grammed. The default clock source setting is therefore the Internal RC Oscillator running at 8
MHz with the longest start-up time and an initial system clock divided by 8. This default setting
ensures that all users can make their desired clock source setting using an In-System or
High-voltage Programmer. This set-up must be taken into account when using ISP tools.
By default, the Internal RC Oscillator provides an approximate 8.0 MHz clock. Though voltage
and temperature dependent, this clock can be accurately calibrated by the user. See
22-1 on page 245
If selected, it can operate without external components. At reset, hardware loads the pre-pro-
grammed calibration value into the OSCCAL Register and thereby automatically configuring
the RC Oscillator. The accuracy of this calibration is shown as Factory calibration in
22-1 on page
By adjusting the OSCCAL register in software, see
ter” on page
calibration. The accuracy of this calibration is shown as User calibration in
245.
The Watchdog Oscillator will still be used for the Watchdog Timer and for the Reset Time-out
even when this Oscillator is used as the device clock. For more information on the pre-pro-
grammed calibration value, see the section
Typ. Time-out (Vcc = 5.0V)
4.1 ms
65 ms
37, it is possible to get a higher calibration accuracy than by using the factory
245.
Number of Watchdog Oscillator Cycles
and
Table
Section 24.7 “Internal Oscillator Speed” on page 265
4-2.
Typ. Time-out (Vcc = 5.0V)
“Calibration Byte” on page
4.3 ms
69 ms
b
, SUT Fuses = 10
“OSCCAL – Oscillator Calibration Regis-
b
, and CKDIV8 Fuse pro-
Number of Cycles
228.
8K (8,192)
Table 22-1 on page
for more details.
512
7728G–AVR–06/10
Table
Table