ATTINY167-15XD Atmel, ATTINY167-15XD Datasheet - Page 102

• Manufacturer Part Number: ATTINY167-15XD
• Description: MCU AVR 16K FLASH 15MHZ 20-TSSOP
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY167-15XD

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 150°C
• Package / Case: 20-TSSOP
• Processor Series: ATTINY1x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10.11.1
102
ATtiny87/ATtiny167
Timer/Counter0 Control Register B – TCCR0B
• Bit 6, 3 – WGM01:0: Waveform Generation Mode
These bits control the counting sequence of the counter, the source for the maximum (TOP)
counter value, and what type of waveform generation to be used, see
operation supported by the Timer/Counter unit are: Normal mode (Counter), Clear Timer on
Compare match (CTC) mode, and two types of Pulse Width Modulation (PWM) modes
”Modes of Operation” on page
Table 10-4.
Notes:
• Bit 7 – FOC0A: Force Output Compare A
The FOC0A bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when
TCCR0B is written when operating in PWM mode. When writing a logical one to the FOC0A
bit, an immediate Compare Match is forced on the Waveform Generation unit. The OC0A out-
put is changed according to its COM0A1:0 bits setting. Note that the FOC0A bit is
implemented as a strobe. Therefore it is the value present in the COM0A1:0 bits that deter-
mines the effect of the forced compare.
A FOC0A strobe will not generate any interrupt, nor will it clear the timer in CTC mode using
OCR0A as TOP.
The FOC0A bit is always read as zero.
• Bit 6:3 – Res: Reserved Bits
These bits are reserved in the ATtiny87/167 and will always read as zero.
• Bit 2:0 – CS02:0: Clock Select
Bit
Read/Write
Initial Value
Mode
0
1
2
3
1. MAX = 0xFF,
2. BOTTOM = 0x00.
WGM01
(CTC0)
0
0
1
1
Waveform Generation Mode Bit Description
FOC0A
W
7
0
WGM00
(PWM0)
0
1
0
1
R
6
–
0
92.).
Timer/Counter
Mode of Operation
Normal
PWM, Phase Correct
CTC
Fast PWM
R
5
–
0
4
–
R
0
3
–
R
0
TOP
0xFF
0xFF
OCR0A
0xFF
CS02
R/W
2
0
Update of
OCR0A at
Immediate
TOP
Immediate
TOP
CS01
R/W
1
0
Table
10-4. Modes of
CS00
R/W
7728G–AVR–06/10
0
0
TOV0 Flag
Set on
MAX
BOTTOM
MAX
MAX
TCCR0B
(1)(2)
(See