ATTINY167-15XD Atmel, ATTINY167-15XD Datasheet - Page 24

• Manufacturer Part Number: ATTINY167-15XD
• Description: MCU AVR 16K FLASH 15MHZ 20-TSSOP
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY167-15XD

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 150°C
• Package / Case: 20-TSSOP
• Processor Series: ATTINY1x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4. System Clock and Clock Options
4.1
24
Clock Systems and their Distribution
ATtiny87/ATtiny167
The ATtiny87/167 provides a large number of clock sources. They can be divided into two cat-
egories: internal and external. Some external clock sources can be shared with the
asynchronous timer. After reset, the clock source is determined by the CKSEL Fuses. Once
the device is running, software clock switching is possible to any other clock sources.
Hardware controls are provided for clock switching management but some specific proce-
dures must be observed. Clock switching should be performed with caution as some settings
could result in the device having an incorrect configuration.
Figure 4-1
clocks may not need to be active at any given time. In order to reduce power consumption, the
clocks to modules not being used can be halted by using different sleep modes or by using
features of the dynamic clock switch circuit (See
page 42
Figure 4-1.
Timer/Counter0
Asynchronous
and
presents the principal clock systems in the AVR and their distribution. All of the
CKOUT
“Dynamic Clock Switch” on page
Fuse
Clock Distribution
General I/O
External Clock
Modules
clk
clk
ASY
I/O
PB4 / XTAL1 / CLKI
Multiplexer
Crystal Oscillator
Control Unit
Low-frequency
AVR Clock
ADC
clk
Source Clock
Clock Switch
ADC
Prescaler
PB5 / XTAL2 / CLKO
31). The clock systems are detailed below.
Reset Logic
“Power Management and Sleep Modes” on
CPU Core
clk
clk
CPU
FLASH
Oscillator
Crystal
Watchdog Clock
Watchdog
Oscillator
Watchdog Timer
RAM
Calibrated RC
Flash and
EEPROM
Oscillator
7728G–AVR–06/10