ATA6613P-PLQW Atmel, ATA6613P-PLQW Datasheet - Page 301

MCU W/LIN TXRX REG WTCHDG 48-QFN

ATA6613P-PLQW

Manufacturer Part Number
ATA6613P-PLQW
Description
MCU W/LIN TXRX REG WTCHDG 48-QFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet

Specifications of ATA6613P-PLQW

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Processor Series
ATA6x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATA6613P-PLQW
Manufacturer:
ATMEL
Quantity:
5 000
Part Number:
ATA6613P-PLQW
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
6.24.2
9111H–AUTO–01/11
Fuse Bits
Table 6-115. Lock Bit Protection Modes
Notes:
The Atmel ATA6612/ATA6613 has three Fuse bytes.
describe briefly the functionality of all the fuses and how they are mapped into the Fuse bytes.
Note that the fuses are read as logical zero, “0”, if they are programmed.
BLB0 Mode
BLB1 Mode
1
2
3
4
1
2
3
4
1. Program the Fuse bits and Boot Lock bits before programming the LB1 and LB2.
2. “1” means unprogrammed, “0” means programmed
BLB02
BLB12
1
1
0
0
1
1
0
0
BLB01
BLB11
1
0
0
1
1
0
0
1
No restrictions for SPM or LPM accessing the Application section.
SPM is not allowed to write to the Application section.
SPM is not allowed to write to the Application section, and LPM
executing from the Boot Loader section is not allowed to read from
the Application section. If Interrupt Vectors are placed in the Boot
Loader section, interrupts are disabled while executing from the
Application section.
LPM executing from the Boot Loader section is not allowed to read
from the Application section. If Interrupt Vectors are placed in the
Boot Loader section, interrupts are disabled while executing from
the Application section.
No restrictions for SPM or LPM accessing the Boot Loader
section.
SPM is not allowed to write to the Boot Loader section.
SPM is not allowed to write to the Boot Loader section, and LPM
executing from the Application section is not allowed to read from
the Boot Loader section. If Interrupt Vectors are placed in the
Application section, interrupts are disabled while executing from
the Boot Loader section.
LPM executing from the Application section is not allowed to read
from the Boot Loader section. If Interrupt Vectors are placed in the
Application section, interrupts are disabled while executing from
the Boot Loader section.
(1)(2)
. Only Atmel
Atmel ATA6612/ATA6613
Table 6-116
®
ATA6612/ATA6613.
to
Table 6-118 on page 303
301

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