ATA6613P-PLQW Atmel, ATA6613P-PLQW Datasheet - Page 293

• Manufacturer Part Number: ATA6613P-PLQW
• Description: MCU W/LIN TXRX REG WTCHDG 48-QFN
• Manufacturer: Atmel
• Series: AVR® ATA66 LIN-SBCr

Specifications of ATA6613P-PLQW

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: ATA6x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 3
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.23.7.3
6.23.7.4
6.23.7.5
6.23.7.6
6.23.7.7
9111H–AUTO–01/11
Performing a Page Write
Using the SPM Interrupt
Consideration While Updating BLS
Prevent Reading the RWW Section During Self-Programming
Setting the Boot Loader Lock Bits by SPM
To execute Page Write, set up the address in the Z-pointer, write “X0000101” to SPMCSR and
execute SPM within four clock cycles after writing SPMCSR. The data in R1 and R0 is
ignored. The page address must be written to PCPAGE. Other bits in the Z-pointer must be
written to zero during this operation.
If the SPM interrupt is enabled, the SPM interrupt will generate a constant interrupt when the
SELFPRGEN bit in SPMCSR is cleared. This means that the interrupt can be used instead of
polling the SPMCSR Register in software. When using the SPM interrupt, the Interrupt Vectors
should be moved to the BLS section to avoid that an interrupt is accessing the RWW section
when it is blocked for reading. How to move the interrupts is described in
page
Special care must be taken if the user allows the Boot Loader section to be updated by leaving
Boot Lock bit11 unprogrammed. An accidental write to the Boot Loader itself can corrupt the
entire Boot Loader, and further software updates might be impossible. If it is not necessary to
change the Boot Loader software itself, it is recommended to program the Boot Lock bit11 to
protect the Boot Loader software from any internal software changes.
During Self-Programming (either Page Erase or Page Write), the RWW section is always
blocked for reading. The user software itself must prevent that this section is addressed during
the self programming operation. The RWWSB in the SPMCSR will be set as long as the RWW
section is busy. During Self-Programming the Interrupt Vector table should be moved to the
BLS as described in
addressing the RWW section after the programming is completed, the user software must
clear the RWWSB by writing the RWWSRE. See
Loader” on page 296
To set the Boot Loader Lock bits, write the desired data to R0, write “X0001001” to SPMCSR
and execute SPM within four clock cycles after writing SPMCSR. The only accessible Lock
bits are the Boot Lock bits that may prevent the Application and Boot Loader section from any
software update by the MCU.
See
the Boot Loader bits affect the Flash access.
• Page Write to the RWW section: The NRWW section can be read during the Page Write.
• Page Write to the NRWW section: The CPU is halted during the operation.
Table 6-103 on page 288
R0
74.
Bit
7
1
“Watchdog Timer” on page
for an example.
6
1
and
BLB12
5
Table 6-104 on page 288
BLB11
4
Atmel ATA6612/ATA6613
74, or the interrupts must be disabled. Before
“Simple Assembly Code Example for a Boot
BLB02
3
BLB01
2
for how the different settings of
1
1
“Watchdog Timer” on
0
1
293