ATA6613P-PLQW Atmel, ATA6613P-PLQW Datasheet - Page 222

MCU W/LIN TXRX REG WTCHDG 48-QFN

ATA6613P-PLQW

Manufacturer Part Number
ATA6613P-PLQW
Description
MCU W/LIN TXRX REG WTCHDG 48-QFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet

Specifications of ATA6613P-PLQW

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Processor Series
ATA6x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Manufacturer
Quantity
Price
Part Number:
ATA6613P-PLQW
Manufacturer:
ATMEL
Quantity:
5 000
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ATA6613P-PLQW
Manufacturer:
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6.18.4
6.18.4.1
222
Atmel ATA6612/ATA6613
Frame Formats
USART MSPIM Initialization
A serial frame for the MSPIM is defined to be one character of 8 data bits. The USART in
MSPIM mode has two valid frame formats:
A frame starts with the least or most significant data bit. Then the next data bits, up to a total of
eight, are succeeding, ending with the most or least significant bit accordingly. When a com-
plete frame is transmitted, a new frame can directly follow it, or the communication line can be
set to an idle (high) state.
The UDORDn bit in UCSRnC sets the frame format used by the USART in MSPIM mode. The
Receiver and Transmitter use the same setting. Note that changing the setting of any of these
bits will corrupt all ongoing communication for both the Receiver and Transmitter.
16-bit data transfer can be achieved by writing two data bytes to UDRn. A UART transmit com-
plete interrupt will then signal that the 16-bit value has been shifted out.
The USART in MSPIM mode has to be initialized before any communication can take place.
The initialization process normally consists of setting the baud rate, setting master mode of
operation (by setting DDR_XCKn to one), setting frame format and enabling the Transmitter
and the Receiver. Only the transmitter can operate independently. For interrupt driven USART
operation, the Global Interrupt Flag should be cleared (and thus interrupts globally disabled)
when doing the initialization.
Note:
Before doing a re-initialization with changed baud rate, data mode, or frame format, be sure
that there is no ongoing transmissions during the period the registers are changed. The TXCn
Flag can be used to check that the Transmitter has completed all transfers, and the RXCn
Flag can be used to check that there are no unread data in the receive buffer. Note that the
TXCn Flag must be cleared before each transmission (before UDRn is written) if it is used for
this purpose.
The following simple USART initialization code examples show one assembly and one C func-
tion that are equal in functionality. The examples assume polling (no interrupts enabled). The
baud rate is given as a function parameter. For the assembly code, the baud rate parameter is
assumed to be stored in the r17:r16 registers.
• 8-bit data with MSB first
• 8-bit data with LSB first
To ensure immediate initialization of the XCKn output the baud-rate register (UBRRn) must be
zero at the time the transmitter is enabled. Contrary to the normal mode USART operation the
UBRRn must then be written to the desired value after the transmitter is enabled, but before the
first transmission is started. Setting UBRRn to zero before enabling the transmitter is not neces-
sary if the initialization is done immediately after a reset since UBRRn is reset to zero.
9111H–AUTO–01/11

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