ATA6613P-PLQW Atmel, ATA6613P-PLQW Datasheet - Page 264

• Manufacturer Part Number: ATA6613P-PLQW
• Description: MCU W/LIN TXRX REG WTCHDG 48-QFN
• Manufacturer: Atmel
• Series: AVR® ATA66 LIN-SBCr

Specifications of ATA6613P-PLQW

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: ATA6x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 3
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.20.3
6.20.3.1
264
Atmel ATA6612/ATA6613
Analog Comparator Multiplexed Input
Digital Input Disable Register 1 – DIDR1
Table 6-95.
When changing the ACIS1/ACIS0 bits, the Analog Comparator Interrupt must be disabled by
clearing its Interrupt Enable bit in the ACSR Register. Otherwise an interrupt can occur when
the bits are changed.
It is possible to select any of the ADC7..0 pins to replace the negative input to the Analog
Comparator. The ADC multiplexer is used to select this input, and consequently, the ADC
must be switched off to utilize this feature. If the Analog Comparator Multiplexer Enable bit
(ACME in ADCSRB) is set and the ADC is switched off (ADEN in ADCSRA is zero), MUX2..0
in ADMUX select the input pin to replace the negative input to the Analog Comparator, as
shown in
to the Analog Comparator.
Table 6-96.
• Bit 7..2 – Res: Reserved Bits
• Bit 1, 0 – AIN1D, AIN0D: AIN1, AIN0 Digital Input Disable
Initial Value
Read/Write
ACME
ACIS1
These bits are unused bits in the Atmel
zero.
When this bit is written logic one, the digital input buffer on the AIN1/0 pin is disabled. The
corresponding PIN Register bit will always read as zero when this bit is set. When an ana-
log signal is applied to the AIN1/0 pin and the digital input from this pin is not needed, this
bit should be written logic one to reduce power consumption in the digital input buffer.
Bit
0
1
1
1
1
1
1
1
1
1
0
0
1
1
Table
ACIS1/ACIS0 Settings
Analog Comparator Multiplexed Input
6-96. If ACME is cleared or ADEN is set, AIN1 is applied to the negative input
ADEN
R
7
–
0
ACIS0
x
1
0
0
0
0
0
0
0
0
0
1
0
1
R
6
–
0
Interrupt Mode
Comparator Interrupt on Output Toggle.
Reserved
Comparator Interrupt on Falling Output Edge.
Comparator Interrupt on Rising Output Edge.
MUX2..0
000
001
010
011
100
101
110
111
xxx
xxx
R
5
–
0
Analog Comparator Negative Input
AIN1
AIN1
ADC0
ADC1
ADC2
ADC3
ADC4
ADC5
ADC6
ADC7
R
4
–
0
®
ATA6612/ATA6613, and will always read as
R
3
–
0
R
2
–
0
AIN1D
R/W
1
0
AIN0D
R/W
9111H–AUTO–01/11
0
0
DIDR1