ATA6613P-PLQW Atmel, ATA6613P-PLQW Datasheet - Page 201

• Manufacturer Part Number: ATA6613P-PLQW
• Description: MCU W/LIN TXRX REG WTCHDG 48-QFN
• Manufacturer: Atmel
• Series: AVR® ATA66 LIN-SBCr

Specifications of ATA6613P-PLQW

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: ATA6x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 3
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.17.5
6.17.5.1
9111H–AUTO–01/11
Data Transmission – The USART Transmitter
Sending Frames with 5 to 8 Data Bit
The USART Transmitter is enabled by setting the Transmit Enable (TXEN) bit in the UCSRnB
Register. When the Transmitter is enabled, the normal port operation of the TxDn pin is over-
ridden by the USART and given the function as the Transmitter’s serial output. The baud rate,
mode of operation and frame format must be set up once before doing any transmissions. If
synchronous operation is used, the clock on the XCKn pin will be overridden and used as
transmission clock.
A data transmission is initiated by loading the transmit buffer with the data to be transmitted.
The CPU can load the transmit buffer by writing to the UDRn I/O location. The buffered data in
the transmit buffer will be moved to the Shift Register when the Shift Register is ready to send
a new frame. The Shift Register is loaded with new data if it is in idle state (no ongoing trans-
mission) or immediately after the last stop bit of the previous frame is transmitted. When the
Shift Register is loaded with new data, it will transfer one complete frame at the rate given by
the Baud Register, U2Xn bit or by XCKn depending on mode of operation.
The following code examples show a simple USART transmit function based on polling of the
Data Register Empty (UDREn) Flag. When using frames with less than eight bits, the most
significant bits written to the UDRn are ignored. The USART has to be initialized before the
function can be used. For the assembly code, the data to be sent is assumed to be stored in
Register R16.
Note:
The function simply waits for the transmit buffer to be empty by checking the UDREn Flag,
before loading it with new data to be transmitted. If the Data Register Empty interrupt is uti-
lized, the interrupt routine writes the data into the buffer.
Assembly Code Example
C Code Example
USART_Transmit:
void USART_Transmit( unsigned char data )
{
}
; Wait for empty transmit buffer
sbis UCSRnA,UDREn
rjmp USART_Transmit
; Put data (r16) into buffer, sends the data
out
ret
/* Wait for empty transmit buffer */
while ( !( UCSRnA & (1<<UDREn)) )
/* Put data into buffer, sends the data */
UDRn = data;
1. The example code assumes that the part specific header file is included.
For I/O Registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI”
instructions must be replaced with instructions that allow access to extended I/O. Typically
“LDS” and “STS” combined with “SBRS”, “SBRC”, “SBR”, and “CBR”.
UDRn,r16
;
(1)
(1)
Atmel ATA6612/ATA6613
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