ATA6613P-PLQW Atmel, ATA6613P-PLQW Datasheet - Page 289

• Manufacturer Part Number: ATA6613P-PLQW
• Description: MCU W/LIN TXRX REG WTCHDG 48-QFN
• Manufacturer: Atmel
• Series: AVR® ATA66 LIN-SBCr

Specifications of ATA6613P-PLQW

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: ATA6x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 3
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.23.5
6.23.5.1
9111H–AUTO–01/11
Entering the Boot Loader Program
Store Program Memory Control and Status Register – SPMCSR
Entering the Boot Loader takes place by a jump or call from the application program. This may
be initiated by a trigger such as a command received via USART, or SPI interface. Alterna-
tively, the Boot Reset Fuse can be programmed so that the Reset Vector is pointing to the
Boot Flash start address after a reset. In this case, the Boot Loader is started after a reset.
After the application code is loaded, the program can start executing the application code.
Note that the fuses cannot be changed by the MCU itself. This means that once the Boot
Reset Fuse is programmed, the Reset Vector will always point to the Boot Loader Reset and
the fuse can only be changed through the serial or parallel programming interface.
Table 6-105. Boot Reset Fuse
Note:
The Store Program Memory Control and Status Register contains the control bits needed to
control the Boot Loader operations.
• Bit 7 – SPMIE: SPM Interrupt Enable
• Bit 6 – RWWSB: Read-While-Write Section Busy
• Bit 5 – Res: Reserved Bit
• Bit 4 – RWWSRE: Read-While-Write Section Read Enable
Read/Write
Initial Value
BOOTRST
When the SPMIE bit is written to one, and the I-bit in the Status Register is set (one), the
SPM ready interrupt will be enabled. The SPM ready Interrupt will be executed as long as
the SELFPRGEN bit in the SPMCSR Register is cleared.
When a Self-Programming (Page Erase or Page Write) operation to the RWW section is
initiated, the RWWSB will be set (one) by hardware. When the RWWSB bit is set, the
RWW section cannot be accessed. The RWWSB bit will be cleared if the RWWSRE bit is
written to one after a Self-Programming operation is completed. Alternatively the RWWSB
bit will automatically be cleared if a page load operation is initiated.
This bit is a reserved bit in the Atmel
When programming (Page Erase or Page Write) to the RWW section, the RWW section is
blocked for reading (the RWWSB will be set by hardware). To re-enable the RWW sec-
tion, the user software must wait until the programming is completed (SELFPRGEN will be
cleared). Then, if the RWWSRE bit is written to one at the same time as SELFPRGEN, the
next SPM instruction within four clock cycles re-enables the RWW section. The RWW sec-
tion cannot be re-enabled while the Flash is busy with a Page Erase or a Page Write
(SELFPRGEN is set). If the RWWSRE bit is written while the Flash is being loaded, the
Flash load operation will abort and the data loaded will be lost.
Bit
1
0
1. “1” means unprogrammed, “0” means programmed
SPMIE RWWSB
R/W
7
0
Reset Address
Reset Vector = Application Reset (address 0x0000)
Reset Vector = Boot Loader Reset (see
R
6
0
(1)
R
5
–
0
RWWSRE BLBSET PGWRT PGERS SELFPRGEN SPMCSR
R/W
®
4
0
ATA6612/ATA6613 and always read as zero.
Atmel ATA6612/ATA6613
R/W
3
0
Table 6-107 on page
R/W
2
0
R/W
1
0
298)
R/W
0
0
289