ATA6613P-PLQW Atmel, ATA6613P-PLQW Datasheet - Page 170

MCU W/LIN TXRX REG WTCHDG 48-QFN

ATA6613P-PLQW

Manufacturer Part Number
ATA6613P-PLQW
Description
MCU W/LIN TXRX REG WTCHDG 48-QFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet

Specifications of ATA6613P-PLQW

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Processor Series
ATA6x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Manufacturer
Quantity
Price
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ATA6613P-PLQW
Manufacturer:
ATMEL
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ATA6613P-PLQW
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170
Atmel ATA6612/ATA6613
Figure 6-58. Fast PWM Mode, Timing Diagram
The Timer/Counter Overflow Flag (TOV2) is set each time the counter reaches TOP. If the
interrupt is enabled, the interrupt handler routine can be used for updating the compare value.
In fast PWM mode, the compare unit allows generation of PWM waveforms on the OC2x pin.
Setting the COM2x1:0 bits to two will produce a non-inverted PWM and an inverted PWM out-
put can be generated by setting the COM2x1:0 to three. TOP is defined as 0xFF when
WGM2:0 = 3, and OCR2A when MGM2:0 = 7 (see
value will only be visible on the port pin if the data direction for the port pin is set as output.
The PWM waveform is generated by setting (or clearing) the OC2x Register at the compare
match between OCR2x and TCNT2, and clearing (or setting) the OC2x Register at the timer
clock cycle the counter is cleared (changes from TOP to BOTTOM).
The PWM frequency for the output can be calculated by the following equation:
The N variable represents the prescale factor (1, 8, 32, 64, 128, 256, or 1024).
The extreme values for the OCR2A Register represent special cases when generating a PWM
waveform output in the fast PWM mode. If the OCR2A is set equal to BOTTOM, the output will
be a narrow spike for each MAX+1 timer clock cycle. Setting the OCR2A equal to MAX will
result in a constantly high or low output (depending on the polarity of the output set by the
COM2A1:0 bits.)
A frequency (with 50% duty cycle) waveform output in fast PWM mode can be achieved by
setting OC2x to toggle its logical level on each compare match (COM2x1:0 = 1). The wave-
form generated will have a maximum frequency of f
This feature is similar to the OC2A toggle in CTC mode, except the double buffer feature of the
Output Compare unit is enabled in the fast PWM mode.
f
OCnxPWM
Period
TCNTn
OCn
OCn
=
-------------------- -
N
f
1
clk_I/O
256
2
3
4
5
Table 6-59 on page
oc2
6
= f
clk_I/O
7
/2 when OCR2A is set to zero.
(COMnx1:0 = 2)
(COMnx1:0 = 3)
174). The actual OC2x
TOVn Interrupt Flag Set
OCRnx Interrupt
OCRnx Update and
Flag Set
9111H–AUTO–01/11

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