ATA6613P-PLQW Atmel, ATA6613P-PLQW Datasheet - Page 250

• Manufacturer Part Number: ATA6613P-PLQW
• Description: MCU W/LIN TXRX REG WTCHDG 48-QFN
• Manufacturer: Atmel
• Series: AVR® ATA66 LIN-SBCr

Specifications of ATA6613P-PLQW

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: ATA6x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 3
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

250
Atmel ATA6612/ATA6613
Figure 6-90. Data Transfer in Master Receiver Mode
A START condition is sent by writing the following value to TWCR:
TWEN must be written to one to enable the 2-wire Serial Interface, TWSTA must be written to
one to transmit a START condition and TWINT must be set to clear the TWINT Flag. The TWI
will then test the 2-wire Serial Bus and generate a START condition as soon as the bus
becomes free. After a START condition has been transmitted, the TWINT Flag is set by hard-
ware, and the status code in TWSR will be 0x08 (see
enter MR mode, SLA+R must be transmitted. This is done by writing SLA+R to TWDR. There-
after the TWINT bit should be cleared (by writing it to one) to continue the transfer. This is
accomplished by writing the following value to TWCR:
When SLA+R have been transmitted and an acknowledgement bit has been received, TWINT
is set again and a number of status codes in TWSR are possible. Possible status codes in
Master mode are 0x38, 0x40, or 0x48. The appropriate action to be taken for each of these
status codes is detailed in
TWDR Register when the TWINT Flag is set high by hardware. This scheme is repeated until
the last byte has been received. After the last byte has been received, the MR should inform
the ST by sending a NACK after the last received data byte. The transfer is ended by generat-
ing a STOP condition or a repeated START condition. A STOP condition is generated by
writing the following value to TWCR:
A REPEATED START condition is generated by writing the following value to TWCR:
SDA
SCL
TWCR
TWCR
TWCR
TWCR
value
value
value
value
TWINT
TWINT
TWINT
TWINT
Device 1
RECEIVER
MASTER
1
1
1
1
TWEA
TWEA
TWEA
TWEA
TRANSMITTER
X
X
X
X
Device 2
Table 6-91 on page
SLAVE
TWSTA
TWSTA
TWSTA
TWSTA
1
0
0
1
Device 3
TWSTO
TWSTO
TWSTO
TWSTO
0
0
1
0
251. Received data can be read from the
........
TWWC
TWWC
TWWC
TWWC
Table 6-90 on page
X
X
X
X
Device n
TWEN
TWEN
TWEN
TWEN
V
CC
1
1
1
1
R1
248). In order to
–
0
–
0
–
0
–
0
9111H–AUTO–01/11
R2
TWIE
TWIE
TWIE
TWIE
X
X
X
X