ATA6613P-PLQW Atmel, ATA6613P-PLQW Datasheet - Page 251

• Manufacturer Part Number: ATA6613P-PLQW
• Description: MCU W/LIN TXRX REG WTCHDG 48-QFN
• Manufacturer: Atmel
• Series: AVR® ATA66 LIN-SBCr

Specifications of ATA6613P-PLQW

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: ATA6x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 3
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 6-91.
9111H–AUTO–01/11
Status Code
(TWSR)
Prescaler Bits
are 0
0x08
0x10
0x38
0x40
0x48
0x50
0x58
Status of the 2-wire Serial
Bus and 2-wire Serial
Interface Hardware
A START condition has been
transmitted
A repeated START condition
has been transmitted
Arbitration lost in SLA+R or
NOT ACK bit
SLA+R has been transmitted;
ACK has been received
SLA+R has been transmitted;
NOT ACK has been received
Data byte has been received;
ACK has been returned
Data byte has been received;
NOT ACK has been returned
Status codes for Master Receiver Mode
After a repeated START condition (state 0x10) the 2-wire Serial Interface can access the
same Slave again, or a new Slave without transmitting a STOP condition. Repeated START
enables the Master to switch between Slaves, Master Transmitter mode and Master Receiver
mode without losing control over the bus.
No TWDR action or
No TWDR action or
No TWDR action or
No TWDR action or
Read data byte or
Read data byte or
Read data byte or
No TWDR action
No TWDR action
No TWDR action
To/from TWDR
Load SLA+R or
Read data byte
Read data byte
Load SLA+W
Load SLA+R
Application Software Response
STA
0
0
0
0
1
0
0
1
0
1
0
0
1
0
1
STO
0
0
0
0
0
0
0
0
1
1
0
0
0
1
1
To TWCR
TWINT TWEA
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Atmel ATA6612/ATA6613
X
X
X
X
X
X
X
X
X
X
X
0
1
0
1
Next Action Taken by TWI Hardware
SLA+R will be transmitted
ACK or NOT ACK will be received
SLA+R will be transmitted
ACK or NOT ACK will be received
SLA+W will be transmitted
Logic will switch to Master Transmitter mode
2-wire Serial Bus will be released and not
addressed Slave mode will be entered
A START condition will be transmitted when the
bus becomes free
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be
returned
Repeated START will be transmitted
STOP condition will be transmitted and TWSTO
Flag will be reset
STOP condition followed by a START condition
will be transmitted and TWSTO Flag will be reset
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be
returned
Repeated START will be transmitted
STOP condition will be transmitted and TWSTO
Flag will be reset
STOP condition followed by a START condition
will be transmitted and TWSTO Flag will be reset
251