CY8CTST200-48LTXIT Cypress Semiconductor Corp, CY8CTST200-48LTXIT Datasheet - Page 71

• Manufacturer Part Number: CY8CTST200-48LTXIT
• Description: IC MCU 32K FLASH 48-QFN
• Manufacturer: Cypress Semiconductor Corp
• Series: TrueTouch™r

Specifications of CY8CTST200-48LTXIT

• Applications: Touchscreen Controller
• Core Processor: M8C
• Program Memory Type: FLASH (32 kB)
• Controller Series: CY8CT
• Ram Size: 2K x 8
• Interface: I²C, SPI, UART/USART, USB
• Number Of I /o: 38
• Voltage - Supply: 1.8 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-QFN
• Processor Series: CY8CTxx2xx
• Core: M8C
• Data Bus Width: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9.3
These registers are associated with the external crystal oscillator.
9.3.1
The ECO_ENBUS register is used to disable and enable the
external crystal oscillator (ECO).
Bits 2 to 0 ECO_ENBUS[2:0]. 111b – Default. Disables the
external crystal oscillator (ECO).
9.3.2
The ECO TRIM Register (ECO_TRIM) controls gain and
power settings for the 32 kHz crystal oscillator.
These settings should not be changed from their default
state.
Bits 4 to 2: ECO_XGM[2:0]. These bits set the amplifier
gain. The high power mode step size is approximately 220
nA. The low power step size is approximately 5% lower than
the ‘111’ setting.
9.3.3
The ECO Configuration Register provides status and control
for the ECO.
Bit 2 ECO_LPM. This bit enables the ECO low power
mode when high. This is recommended for use only during
sleep mode.
Bit 1 ECO_EXW. The ECO Exists Written bit is used as a
status bit to indicate that the ECO EX bit was previously writ-
ten to. It is read only. When this bit is a '1' indicates that the
ECO_CFG register was written to and is now locked.
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
1,D2h
1,D3h
1,E1h
Address
Address
Address
Register Definitions
ECO_ENBUS
ECO_TRIM
ECO_CFG
ECO_ENBUS Register
ECO_TRIM Register
ECO_CFG Register
Name
Name
Name
Bit 7
Bit 7
Bit 7
Bit 6
Bit 6
Bit 6
Bit 5
Bit 5
Bit 5
Bit 4
Bit 4
Bit 4
011b – Allows the ECO to be enabled by bits in the
ECO_CFG register.
Other values are reserved. See the
page 70
For additional information, refer to the
ter on page
’000’ is the lowest power setting.
’111’ is the highest power setting (30% power reduction).
Bits 1 to 0: ECO_LP[1:0]. These bits set the gain mode.
’00’ is the highest power setting.
’11’ is the lowest power setting. (30% power reduction).
For additional information, refer to the
on page
Bit 0 ECO_EX. The ECO Exists bit serves as a flag to the
hardware, to indicate that an external crystal oscillator exists
in the system. Just after boot, it may be written only once to
a value of '1' (crystal exists) or '0' (crystal does not exist).
If the bit is '0', a switch-over to the ECO is locked out by
hardware. If the bit is '1', hardware allows the firmware to
freely switch between the ECO and ILO. It should be written
as early as possible after a Power On Reset (POR) or Exter-
nal Reset (XRES) event.
For additional information, refer to the
on page 277
ECO_XGM[2:0]
for the proper sequence for enabling the ECO.
Bit 3
270.
Bit 3
Bit 3
269.
ECO_LPM
Bit 2
Bit 2
Bit 2
ECO_ENBUS[2:0]
External Crystal Oscillator (ECO)
ECO_EXW
Bit 1
Bit 1
Bit 1
ECO_LP[1:0]
Application Overview on
ECO_ENBUS regis-
ECO_TRIM register
ECO_CFG register
ECO_EX
Bit 0
Bit 0
Bit 0
RW : 07
RW : 11
Access
Access
RW : 00
Access
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