CY8CTST200-48LTXIT Cypress Semiconductor Corp, CY8CTST200-48LTXIT Datasheet - Page 165

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CY8CTST200-48LTXIT

Manufacturer Part Number
CY8CTST200-48LTXIT
Description
IC MCU 32K FLASH 48-QFN
Manufacturer
Cypress Semiconductor Corp
Series
TrueTouch™r
Datasheet

Specifications of CY8CTST200-48LTXIT

Applications
Touchscreen Controller
Core Processor
M8C
Program Memory Type
FLASH (32 kB)
Controller Series
CY8CT
Ram Size
2K x 8
Interface
I²C, SPI, UART/USART, USB
Number Of I /o
38
Voltage - Supply
1.8 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-QFN
Processor Series
CY8CTxx2xx
Core
M8C
Data Bus Width
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
This chapter explains the Full-Speed USB (Universal Serial Bus) resource and its associated registers. For a quick reference
of all PSoC registers in address order, refer to the
20.1
The PSoC USB system resource adheres to the USB 2.0
Specification for full-speed devices operating at 12 Mbps
with one upstream port and one USB address. PSoC USB
consists of these components:
Figure 20-1. USB Block Diagram
System Bus
At the PSoC system level, the full-speed USB system
resource interfaces to the rest of the PSoC by way of the
M8C's register access instructions and to the outside world
by way of the two USB pins. The SIE supports nine end-
points including a bidirectional control endpoint (endpoint 0)
and eight uni-directional data endpoints (endpoints 1 to 8).
The uni-directional data endpoints are individually config-
urable as either IN or OUT.
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
20. Full-Speed USB
Serial Interface Engine (SIE) block
PSoC Memory Arbiter (PMA) block
512 bytes of dedicated SRAM
A Full-Speed USB Transceiver with internal regulator
and two dedicated USB pins
SIE Regs
DP
Architectural Description
USB XCVR
SIE
PMA
DM
SRAM
Register Reference chapter on page
20.2
The individual components and issues of the USB system
are described in detail in the following sections.
20.2.1
The USB Serial Interface Engine (SIE) allows the PSoC
device to communicate with the USB host at full-speed data
rates (12 Mbps). The SIE simplifies the interface to USB
traffic by automatically handling the following USB process-
ing tasks without firmware intervention:
Firmware is required to handle various parts of the USB
interface. The SIE issues interrupts after key USB events to
direct firmware to appropriate tasks:
Translates the encoded received data and formats the
data to be transmitted on the bus.
Generates and checks CRCs. Incoming packets failing
checksum verification are ignored.
Checks addresses. Ignores all transactions not
addressed to the device.
Sends appropriate ACK/NAK/Stall handshakes.
Identifies token type (SETUP, IN, OUT) and sets the
appropriate token bit once a valid token in received.
Identifies Start-of-Frame (SOF) and saves the frame
count.
Sends data to or retrieves data from the USB SRAM, by
way of the PSoC Memory Arbiter (PMA).
Fill and empty the USB data buffers in USB SRAM.
Enable PMA channels appropriately.
Coordinate enumeration by decoding USB device
requests.
Suspend and resume coordination.
Verify and select data toggle values.
Application Description
USB SIE
187.
165
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