CY8CTST200-48LTXIT Cypress Semiconductor Corp, CY8CTST200-48LTXIT Datasheet - Page 6

• Manufacturer Part Number: CY8CTST200-48LTXIT
• Description: IC MCU 32K FLASH 48-QFN
• Manufacturer: Cypress Semiconductor Corp
• Series: TrueTouch™r

Specifications of CY8CTST200-48LTXIT

• Applications: Touchscreen Controller
• Core Processor: M8C
• Program Memory Type: FLASH (32 kB)
• Controller Series: CY8CT
• Ram Size: 2K x 8
• Interface: I²C, SPI, UART/USART, USB
• Number Of I /o: 38
• Voltage - Supply: 1.8 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-QFN
• Processor Series: CY8CTxx2xx
• Core: M8C
• Data Bus Width: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Contents
6
4.
5.
6.
RAM Paging
Interrupt Controller
General Purpose I/O (GPIO)
3.2
4.1
4.2
5.1
5.2
5.3
6.1
6.2
Register Definitions ................................................................................................................ 38
Architectural Description......................................................................................................... 39
4.1.1
4.1.2
4.1.3
4.1.4
4.1.5
4.1.6
Register Definitions ................................................................................................................ 42
4.2.1
4.2.2
4.2.3
4.2.4
4.2.5
4.2.6
4.2.7
Architectural Description......................................................................................................... 45
5.1.1
Application Overview .............................................................................................................. 46
Register Definitions ................................................................................................................ 48
5.3.1
5.3.2
5.3.3
5.3.4
5.3.5
5.3.6
5.3.7
5.3.8
5.3.9
Architectural Description......................................................................................................... 55
6.1.1
6.1.2
6.1.3
6.1.4
6.1.5
6.1.6
6.1.7
Register Definitions ................................................................................................................ 59
6.2.1
6.2.2
6.2.3
6.2.4
6.2.5
3.1.2.11 WriteAndVerify Function.............................................................................. 37
3.1.2.12 HWBootReset Function............................................................................... 38
6.1.6.1
Basic Paging..............................................................................................................39
Stack Operations ....................................................................................................... 40
Interrupts ................................................................................................................... 40
MVI Instructions......................................................................................................... 40
Current Page Pointer................................................................................................. 40
Index Memory Page Pointer ...................................................................................... 41
TMP_DRx Registers ................................................................................................. 42
CUR_PP Register ..................................................................................................... 42
STK_PP Register ..................................................................................................... 43
IDX_PP Register ...................................................................................................... 43
MVR_PP Register .................................................................................................... 43
MVW_PP Register .................................................................................................... 44
Related Registers ...................................................................................................... 44
Posted versus Pending Interrupts ............................................................................. 46
INT_CLR0 Register .................................................................................................. 48
INT_CLR1 Register ................................................................................................... 49
INT_CLR2 Register .................................................................................................. 50
INT_MSK0 Register................................................................................................... 51
INT_MSK1 Register................................................................................................... 51
INT_MSK2 Register................................................................................................... 52
INT_SW_EN Register ............................................................................................... 52
INT_VC Register ...................................................................................................... 52
Related Registers ...................................................................................................... 53
General Description................................................................................................... 56
Digital I/O................................................................................................................... 56
Analog and Digital Inputs........................................................................................... 56
Port 1 Distinctions...................................................................................................... 56
Port 0 Distinctions...................................................................................................... 57
GPIO Block Interrupts................................................................................................ 57
Data Bypass .............................................................................................................. 58
PRTxDR Registers ................................................................................................... 59
PRTxIE Registers ..................................................................................................... 59
PRTxDMx Registers ................................................................................................. 60
IO_CFG1 Register..................................................................................................... 61
IO_CFG2 Register..................................................................................................... 61
Interrupt Modes ........................................................................................... 57
39
45
55
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