CY8CTST200-48LTXIT Cypress Semiconductor Corp, CY8CTST200-48LTXIT Datasheet - Page 268

• Manufacturer Part Number: CY8CTST200-48LTXIT
• Description: IC MCU 32K FLASH 48-QFN
• Manufacturer: Cypress Semiconductor Corp
• Series: TrueTouch™r

Specifications of CY8CTST200-48LTXIT

• Applications: Touchscreen Controller
• Core Processor: M8C
• Program Memory Type: FLASH (32 kB)
• Controller Series: CY8CT
• Ram Size: 2K x 8
• Interface: I²C, SPI, UART/USART, USB
• Number Of I /o: 38
• Voltage - Supply: 1.8 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-QFN
• Processor Series: CY8CTxx2xx
• Core: M8C
• Data Bus Width: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

OUT_P0
21.4.10 OUT_P0
This register enables specific internal signals to output to Port 0 pins.
The GPIO drive modes must be specified to support the desired output mode (registers PRT1DM1 and PRT1DM0). If a pin is
enabled for output by a bit in this register, the corresponding signal has priority over any other internal function that may be
configured to output to that pin.
For additional information, refer to the
Bit
7
6
5
4
268
Individual Register Names and Addresses:
OUT_P0: 1,D1h
Access : POR
Bit Name
1,D1h
P0P7D
P0P7EN
P0P4D
P0P4EN
Name
Output Override to Port 0 Register
RW : 0
P0P7D
7
P0P7EN
RW : 0
6
Description
0
1
This bit enables pin P0 [7] for output of the signal selected by P0P7D.
0
1
0
1
Note : During sleep mode these outputs will not be passed through P0[4].
This bit enables pin P0 [4] for output of the signal selected by P0P4D.
0
1
Register Definitions on page 112
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
Select Main system clock (SYSCLK).
Select either TrueTouch Output signal (CS_OUT is selected by CS_OUT[1:0] bits in
CS_CR0 register) or TrueTouch clock depending upon bit 7 in PRS_CR register.
No internal signal output to P0 [7].
Output the signal selected by P0P7D on to P0[7].
Select Timer Output (TIMEROUT)
Select CLK32
No internal signal output to P0 [4].
Output the signal selected by P0P4D on to P0[4].
P0P4D
RW : 0
5
P0P4EN
RW : 0
4
in the Digital Clocks chapter.
3
2
1,D1h
1
0
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