CY8CTST200-48LTXIT Cypress Semiconductor Corp, CY8CTST200-48LTXIT Datasheet - Page 68

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CY8CTST200-48LTXIT

Manufacturer Part Number
CY8CTST200-48LTXIT
Description
IC MCU 32K FLASH 48-QFN
Manufacturer
Cypress Semiconductor Corp
Series
TrueTouch™r
Datasheet

Specifications of CY8CTST200-48LTXIT

Applications
Touchscreen Controller
Core Processor
M8C
Program Memory Type
FLASH (32 kB)
Controller Series
CY8CT
Ram Size
2K x 8
Interface
I²C, SPI, UART/USART, USB
Number Of I /o
38
Voltage - Supply
1.8 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-QFN
Processor Series
CY8CTxx2xx
Core
M8C
Data Bus Width
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
8.2
The following register is associated with the Internal Low Speed Oscillator (ILO). The register description has an associated
register table showing the bit structure. The bits in the table that are grayed out are reserved bits and are not detailed in the
register description that follows. Always write reserved bits with a value of ‘0’.
8.2.1
The Internal Low Speed Oscillator Trim Register (ILO_TR)
sets the adjustment for the internal low speed oscillator.
Bit 6: PD_MODE. This bit selects power down mode. Set-
ting this bit high disables the oscillator and current bias
when the ILO is powered down, which results in slower star-
tup time. Setting this bit low keeps the small current bias
running when the ILO is powered down, which results in
faster startup time.
Internal Low Speed Oscillator (ILO)
68
Address
1,E9h
Register Definitions
ILO_TR Register
ILO_TR
Name
Bit 7
PD_MODE
Bit 6
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
ILOFREQ
Bit 5
Bit 4
Bit 5: ILOFREQ. When this bit is set, the oscillator operates
at a nominal frequency of 1 kHz, otherwise, it runs at the
default 32 kHz.
Bits 3 to 0: FREQ_TRIM[3:0]. These bits trim the oscillator
frequency. The device-specific value, placed in the trim bits
of this register at boot time, is based on factory testing. Do
not alter the values in the register.
For additional information, refer to the
page
282.
Bit 3
Bit 2
Freq Trim[3:0]
Bit 1
ILO_TR register on
Bit 0
Access
RW : 18
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