CY8CTST200-48LTXIT Cypress Semiconductor Corp, CY8CTST200-48LTXIT Datasheet - Page 234

• Manufacturer Part Number: CY8CTST200-48LTXIT
• Description: IC MCU 32K FLASH 48-QFN
• Manufacturer: Cypress Semiconductor Corp
• Series: TrueTouch™r

Specifications of CY8CTST200-48LTXIT

• Applications: Touchscreen Controller
• Core Processor: M8C
• Program Memory Type: FLASH (32 kB)
• Controller Series: CY8CT
• Ram Size: 2K x 8
• Interface: I²C, SPI, UART/USART, USB
• Number Of I /o: 38
• Voltage - Supply: 1.8 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-QFN
• Processor Series: CY8CTxx2xx
• Core: M8C
• Data Bus Width: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

CUR_PP
21.3.46 CUR_PP
This register is used to set the effective SRAM page for normal memory accesses in a multi-SRAM page device. It is only
used when a device has more than one SRAM page.
In the table above, note that reserved bits are grayed table cells and are not described in the bit description section below.
Reserved bits must always be written with a value of ‘0’. For additional information, refer to the
page 42
Bit
2:0
234
Individual Register Names and Addresses:
CUR_PP : 0,D0h
Access : POR
Bit Name
0,D0h
in the RAM Paging chapter .
Page Bits[2:0]
Name
Current Page Pointer Register
7
6
Description
Bits determine which SRAM page is used for generic SRAM access. See the
page 39
000b
001b
010b
011b
100b
101b
110b
111b
for more information.
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
SRAM Page 0
SRAM Page 1
SRAM Page 2
SRAM Page 3
SRAM Page 4
SRAM Page 5
SRAM Page 6
SRAM Page 7
5
4
3
0,D0h
2
Page Bits[2:0]
RW : 0
Register Definitions on
1
RAM Paging chapter on
0
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