CY8CTST200-48LTXIT Cypress Semiconductor Corp, CY8CTST200-48LTXIT Datasheet - Page 305

• Manufacturer Part Number: CY8CTST200-48LTXIT
• Description: IC MCU 32K FLASH 48-QFN
• Manufacturer: Cypress Semiconductor Corp
• Series: TrueTouch™r

Specifications of CY8CTST200-48LTXIT

• Applications: Touchscreen Controller
• Core Processor: M8C
• Program Memory Type: FLASH (32 kB)
• Controller Series: CY8CT
• Ram Size: 2K x 8
• Interface: I²C, SPI, UART/USART, USB
• Number Of I /o: 38
• Voltage - Supply: 1.8 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-QFN
• Processor Series: CY8CTxx2xx
• Core: M8C
• Data Bus Width: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

I2C_CFG register 126, 239
I2C_DR register 129, 241
I2C_SCR register 128, 240
ICAPEN bit 204
IDAC_D register 97, 256
IDACDATA bits 256
IDACEN bit 213
IDX_PP register 43, 236
ILO, See internal low speed oscillator
IMO, See internal main oscillator
IMO_TR register 281
IMO_TR1 register 181
IMODIS bit 278
index memory page pointer in RAM paging 41
INM bit 217
INNx bits 206
INPx bits 206
INS bit 217
INSEL bit 212
instruction formats
instruction set summary 28–29
Int Sel bit 261
INT_CLR0 register 48, 49, 50, 71, 242, 244, 245
INT_MSK0 register 51, 52, 248, 249, 250
INT_SW_EN register 52, 251
INT_VC register 52, 252
INTCAP bits 204
internal low speed oscillator 67
internal M8C registers 27
internal main oscillator 63
interrupt controller 45
Interrupt Enables bits 189
interrupt modes in GPIO 57
interrupt table 47
interrupts in RAM paging 40
INV bit 212
IO analog multiplexer 99
IO_CFG register 61, 272
IRAMDIS bit 257
IRANGE bit 213
stall timing 132
status timing 131
1-byte instructions 30
2-byte instructions 30
3-byte instructions 31
32 kHz clock selection 67
architecture 67
in digital clocks 110
register definitions 68
architecture 63
in digital clocks 109
register definitions 64
application overview 46
architecture 45
interrupt table 47
latency and priority 46
posted vs pending interrupts 46
register definitions 48
architecture 99
register definitions 100
IRESS bit 257
L
low voltage detect (LVD)
LRB bit 240
LSb First bit 192
LUTx bits 210
LVD bit 280
LVDTBEN bits 279
M
M8C, See CPU core
mapping tables, registers 183
master function for SPI 146
measurement units 17
memory arbiter in USB 166
MODE bits in CS_CR0 register 211
MUX_CRx register 100, 270, 271, 277
MVI instructions in RAM paging 40
MVR_PP register 43, 237
MVW_PP register 44, 238
N
No Buzz bit 276
numeric naming conventions 17
O
One Shot bit 221, 224, 225
OSC_CR0 register 276
OSC_CR2 register 65, 278
OUT_P1 register 113, 273, 274
Overrun bit 192
overviews
P
P10D bit 274
P10EN bit 274
P12D bit 273
P12EN bit 273
P14D bit 273
P14EN bit 273
P16D bit 273
P16EN bit 273
Page bits
See POR and LVD
PSoC core 23
register tables 183
system resources 105
TrueTouch system 83
in CUR_PP register 234
in IDX_PP register 236
Index
305
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