CY8CTST200-48LTXIT Cypress Semiconductor Corp, CY8CTST200-48LTXIT Datasheet - Page 219

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CY8CTST200-48LTXIT

Manufacturer Part Number
CY8CTST200-48LTXIT
Description
IC MCU 32K FLASH 48-QFN
Manufacturer
Cypress Semiconductor Corp
Series
TrueTouch™r
Datasheet

Specifications of CY8CTST200-48LTXIT

Applications
Touchscreen Controller
Core Processor
M8C
Program Memory Type
FLASH (32 kB)
Controller Series
CY8CT
Ram Size
2K x 8
Interface
I²C, SPI, UART/USART, USB
Number Of I /o
38
Voltage - Supply
1.8 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-QFN
Processor Series
CY8CTxx2xx
Core
M8C
Data Bus Width
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
21.3.31 CS_SLEW
This register enables and controls a fast slewing mode for the relaxation oscillator.
For additional information, refer to the
Bit
7:1
0
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
Individual Register Names and Addresses:
CS_SLEW : 0,A8h
Access : POR
Bit Name
FastSlew[6:0]
FS_EN
Name
TrueTouch Slew Control Register
7
6
Description
This 7-bit value sets a counter, clocked at the IMO frequency. While the counter is counting down
from this value, the relaxation oscillator edge slews at the maximum gain setting. During this interval,
the IRANGE bits in the CS_CR2 register are internally set to maximum (11b). At the end of the inter-
val, the user-defined IRANGE level is restored so that the relaxation oscillator continues slewing with
a slower edge rate to the target voltage threshold. If the FS_EN bit is low, the FastSlew setting has no
effect.
After each edge of the relaxation oscillator, the counter is re-loaded and the fast slewing interval re-
occurs, followed by the slower edge rate at the end of the count down.
Note that the IRANGE bits in the CS_CR2 register always read the user-defined setting. Because the
IRANGE value is forced to maximum during this interval, the increase in the edge rate can be 1X, 2X,
4X, or 8X, depending on the programmed value of the IRANGE bits.
0000000b
0000001b
1111111b
Enable bit for the Fast Slew mode.
0
1
Register Definitions on page 92
Fast slew mode disabled.
Fast slew mode enabled. After each relaxation oscillator transition, the relaxation oscillator
runs with a higher current for a time controlled by the FastSlew bits.
5
No fast edge rate interval.
Minimum fast edge rate interval (1 IMO period).
Maximum fast edge rate interval (127 IMO period).
FastSlew[6:0]
RW : 00
4
in the TrueTouch Module chapter .
3
2
1
0,A8h
CS_SLEW
FS_EN
RW : 0
0,A8h
0
219
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