CY8CTST200-48LTXIT Cypress Semiconductor Corp, CY8CTST200-48LTXIT Datasheet - Page 233

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CY8CTST200-48LTXIT

Manufacturer Part Number
CY8CTST200-48LTXIT
Description
IC MCU 32K FLASH 48-QFN
Manufacturer
Cypress Semiconductor Corp
Series
TrueTouch™r
Datasheet

Specifications of CY8CTST200-48LTXIT

Applications
Touchscreen Controller
Core Processor
M8C
Program Memory Type
FLASH (32 kB)
Controller Series
CY8CT
Ram Size
2K x 8
Interface
I²C, SPI, UART/USART, USB
Number Of I /o
38
Voltage - Supply
1.8 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-QFN
Processor Series
CY8CTxx2xx
Core
M8C
Data Bus Width
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
21.3.45 I2C_BUF
This register is the CPU read/write interface to the data buffer.
For additional information, refer to the
Bit
7:0
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
Individual Register Names and Addresses:
I2C_BUF : 0,CFh
Access : POR
Bit Name
Data Buffer[7:0]
Name
I
2
C Data Buffer Register
7
6
Description
The I2C Data Buffer Register (I2C_BUF) is the CPU read/write interface to the data buffer. Whenever
this register is read, the data at the location pointed to by CPU current pointer (CPU_CP) is returned.
Similarly, whenever this register is written, the data is transferred to the buffer and written at the loca-
tion pointed to by the CPU current pointer (CPU_CP). Whenever this register is read without initializ-
ing the RAM contents either through the I2C or CPU interface, no valid value is returned.
Register Definitions on page 122
5
0,CFh
4
Data Buffer [7: 0]
RW : 00
in the I2C Slave chapter.
3
2
1
0,CFh
I2C_BUF
0
233
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