CY8CTST200-48LTXIT Cypress Semiconductor Corp, CY8CTST200-48LTXIT Datasheet - Page 38

• Manufacturer Part Number: CY8CTST200-48LTXIT
• Description: IC MCU 32K FLASH 48-QFN
• Manufacturer: Cypress Semiconductor Corp
• Series: TrueTouch™r

Specifications of CY8CTST200-48LTXIT

• Applications: Touchscreen Controller
• Core Processor: M8C
• Program Memory Type: FLASH (32 kB)
• Controller Series: CY8CT
• Ram Size: 2K x 8
• Interface: I²C, SPI, UART/USART, USB
• Number Of I /o: 38
• Voltage - Supply: 1.8 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-QFN
• Processor Series: CY8CTxx2xx
• Core: M8C
• Data Bus Width: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

about 1 ms longer than WriteBlock (but still within the Twrite
spec). The function performs a three-step process. In the
first step, 128 bytes of data are moved from SRAM to the
Flash. In the second step, Flash is programmed with the
data. In the final step the Flash data are compared against
the input data values, thus verifying that the write was suc-
cessful. The write and verify is one SROM operation; there-
fore, the SROM is not exited until the verify is completed.
The parameters for this block are identical to the WriteBlock
(see
fails, the 0x04 error code is returned at SRAM address 0xF8
Table 3-18. WriteAndVerify Parameters (0Ah)
3.1.2.12
The HWBootReset function is used to force a hardware
reset. A hardware reset causes all registers to go back to
their POR state. Then, the SROM SWBootReset function
executes, followed by Flash code execution beginning at
address 0x0000.
The HWBootReset function only requires that the CPU_A,
KEY1, and KEY2 be set up correctly. As with all other
SROM functions, if the setup is incorrect, the SROM exe-
cutes a HALT. Then, either a POR, XRES, or WDR is
needed to clear the HALT.
page 135
Table 3-19. HWBootReset Parameters (0Fh)
3.2
This chapter has no register detail information because
there are no registers directly assigned to the Supervisory
ROM.
Supervisory ROM (SROM)
38
KEY1
KEY2
BLOCKID
POINTER
KEY1
KEY2
Name
Name
WriteBlock Function on page
0,F8h
0,F9h
Address
for more information.
Address
0,F8h
0,F9h
0,FAh
0,FBh
Register Definitions
HWBootReset Function
RAM
RAM
Type
RAM
RAM
RAM
RAM
Type
3Ah.
Stack Pointer value+3, when SSC is executed.
See Chapter “System Resets” on
3Ah.
Stack Pointer value+3, when SSC is
executed.
Flash block number.
First of 128 addresses in SRAM, where
the data to be stored in Flash, is located
before calling WriteBlock.
35). If the verify operation
Description
Description
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
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