CY8CTST200-48LTXIT Cypress Semiconductor Corp, CY8CTST200-48LTXIT Datasheet - Page 244

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CY8CTST200-48LTXIT

Manufacturer Part Number
CY8CTST200-48LTXIT
Description
IC MCU 32K FLASH 48-QFN
Manufacturer
Cypress Semiconductor Corp
Series
TrueTouch™r
Datasheet

Specifications of CY8CTST200-48LTXIT

Applications
Touchscreen Controller
Core Processor
M8C
Program Memory Type
FLASH (32 kB)
Controller Series
CY8CT
Ram Size
2K x 8
Interface
I²C, SPI, UART/USART, USB
Number Of I /o
38
Voltage - Supply
1.8 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-QFN
Processor Series
CY8CTxx2xx
Core
M8C
Data Bus Width
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
INT_CLR1
21.3.55 INT_CLR1
This register is used to enable the individual interrupt sources' ability to clear posted interrupts.
When bits in this register are read, a '1' is returned for every bit position that has a corresponding posted interrupt. When bits
in this register are written with a '0' and ENSWINT is not set, posted interrupts are cleared at the corresponding bit positions.
If there is no posted interrupt, there is no effect. When bits in this register are written with a '1' and ENSWINT is set, an inter-
rupt is posted in the interrupt controller.
For additional information, refer to the
Bit
7
6
5
(continued on next page)
244
Individual Register Names and Addresses:
INT_CLR1 : 0,DBh
Access : POR
Bit Name
0,DBh
Endpoint3
Endpoint2
Endpoint1
Name
Interrupt Clear Register 1
Endpoint3
RW : 0
7
Endpoint2
RW : 0
6
Description
Read 0 No posted interrupt for USB Endpoint3.
Read 1 Posted interrupt present for USB Endpoint3.
Write 0 AND ENSWINT = 0
Write 1 AND ENSWINT = 0
Write 0 AND ENSWINT = 1
Write 1 AND ENSWINT = 1
Read 0 No posted interrupt for USB Endpoint2.
Read 1 Posted interrupt present for USB Endpoint2.
Write 0 AND ENSWINT = 0
Write 1 AND ENSWINT = 0
Write 0 AND ENSWINT = 1
Write 1 AND ENSWINT = 1
Read 0 No posted interrupt for USB Endpoint1.
Read 1 Posted interrupt present for USB Endpoint1.
Write 0 AND ENSWINT = 0
Write 1 AND ENSWINT = 0
Write 0 AND ENSWINT = 1
Write 1 AND ENSWINT = 1
Register Definitions on page 48
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
Endpoint1
RW : 0
5
0,DBh
Endpoint0
RW : 0
4
No effect.
No effect.
Post an interrupt for USB Endpoint3.
Clear posted interrupt if it exists.
No effect.
No effect.
Post an interrupt for USB Endpoint2.
Clear posted interrupt if it exists.
No effect.
No effect.
Post an interrupt for USB Endpoint1.
Clear posted interrupt if it exists.
in the Interrupt Controller chapter.
USB_SOF
RW : 0
3
USB_BUS_RST
RW : 0
2
RW : 0
Timer2
1
RW : 0
Timer1
0
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