PIC18F86J50T-I/PT Microchip Technology, PIC18F86J50T-I/PT Datasheet - Page 85

• Manufacturer Part Number: PIC18F86J50T-I/PT
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F86J50T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 65
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3904 B
• Interface Type: I2C, MSSP, SPI, EUSART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 65
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183022, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162087 - HEADER MPLAB ICD2 18F87J50 68/84MA180021 - MODULE PLUG-IN 18F87J50 FS USBAC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18F86J50T-I/PTTR

TABLE 5-5:
© 2009 Microchip Technology Inc.
ECCP1AS
ECCP1DEL
CCPR1H
CCPR1L
CCP1CON
ECCP2AS
ECCP2DEL
CCPR2H
CCPR2L
CCP2CON
ECCP3AS
ECCP3DEL
CCPR3H
CCPR3L
CCP3CON
SPBRG1
RCREG1
TXREG1
TXSTA1
RCSTA1
SPBRG2
RCREG2
TXREG2
TXSTA2
EECON2
EECON1
IPR3
PIR3
PIE3
IPR2
PIR2
PIE2
IPR1
PIR1
PIE1
RCSTA2
OSCTUNE
Legend:
Note
File Name
1:
2:
3:
4:
5:
6:
7:
8:
x = unknown, u = unchanged, - = unimplemented, q = value depends on condition. Bold indicates shared-access SFRs.
Bit 21 of the PC is only available in Serial Programming modes.
Default (legacy) SFR at this address, available when WDTCON<4> = 0.
Configuration SFR, overlaps with default SFR at this address; available only when WDTCON<4> = 1.
Reset value is ‘0’ when Two-Speed Start-up is enabled and ‘1’ if disabled.
The SSPxMSK registers are only accessible when SSPxCON2<3:0> = 1001.
Alternate names and definitions for these bits when the MSSP module is operating in I
Masking Modes” for details
These bits and/or registers are only available in 80-pin devices; otherwise, they are unimplemented and read as ‘0’. Reset values are
shown for 80-pin devices.
The PMADDRH/PMDOUT1H and PMADDRL/PMDOUT1L register pairs share the physical registers and addresses, but have different
functions determined by the module’s operating mode. See Section 11.1.2 “Data Registers” for more information.
Capture/Compare/PWM Register 1 HIgh Byte
Capture/Compare/PWM Register 1 Low Byte
Capture/Compare/PWM Register 2 High Byte
Capture/Compare/PWM Register 2 Low Byte
Capture/Compare/PWM Register 3 High Byte
Capture/Compare/PWM Register 3 Low Byte
EUSART1 Baud Rate Generator Register Low Byte
EUSART1 Receive Register
EUSART1 Transmit Register
EUSART2 Baud Rate Generator Register Low Byte
EUSART2 Receive Register
EUSART2 Transmit Register
Program Memory Control Register 2 (not a physical register)
ECCP1ASE ECCP1AS2 ECCP1AS1 ECCP1AS0
ECCP2ASE ECCP2AS2 ECCP2AS1 ECCP2AS0
ECCP3ASE ECCP3AS2 ECCP3AS1 ECCP3AS0
P1RSEN
P2RSEN
P3RSEN
OSCFIP
OSCFIF
OSCFIE
INTSRC
SSP2IP
SSP2IE
SSP2IF
PMPIE
PMPIP
PMPIF
CSRC
CSRC
SPEN
SPEN
P1M1
P2M1
P3M1
Bit 7
—
REGISTER FILE SUMMARY (PIC18F87J50 FAMILY) (CONTINUED)
BCL2IP
BCL2IF
BCL2IE
P1DC6
P2DC6
P3DC6
CM2IP
CM2IE
PLLEN
CM2IF
P1M0
P2M0
P3M0
ADIP
ADIE
Bit 6
ADIF
TX9
RX9
TX9
RX9
—
WPROG
P1DC5
DC1B1
P2DC5
DC2B1
P3DC5
DC3B1
RC2IP
RC2IE
CM1IP
CM1IF
CM1IE
RC1IP
RC1IE
SREN
RC2IF
RC1IF
SREN
TXEN
TXEN
TUN5
Bit 5
P1DC4
DC1B0
P2DC4
DC2B0
P3DC4
DC3B0
USBIP
USBIE
CREN
USBIF
CREN
SYNC
SYNC
FREE
TX2IP
TX2IF
TX2IE
TX1IP
TX1IF
TX1IE
TUN4
Bit 4
PSS1AC1
PSS2AC1
PSS3AC1
CCP1M3
CCP2M3
CCP3M3
WRERR
TMR4IP
TMR4IF
TMR4IE
SENDB
ADDEN
SENDB
BCL1IP
BCL1IF
BCL1IE
SSP1IP
SSP1IF
SSP1IE
ADDEN
P1DC3
P2DC3
P3DC3
TUN3
Bit 3
PIC18F87J50 FAMILY
PSS1AC0
PSS2AC0
PSS3AC0
CCP1M2
CCP2M2
CCP3M2
CCP5IP
CCP5IF
CCP5IE
CCP1IP
CCP1IF
CCP1IE
P1DC2
P2DC2
P3DC2
WREN
BRGH
BRGH
LVDIP
LVDIE
FERR
LVDIF
FERR
TUN2
Bit 2
2
C™ Slave mode. See Section 19.4.3.2 “Address
PSS1BD1
PSS2BD1
PSS3BD1
CCP1M1
CCP2M1
CCP3M1
CCP4IP
CCP4IF
CCP4IE
TMR3IP
TMR3IF
TMR3IE
TMR2IP
TMR2IF
TMR2IE
P1DC1
P2DC1
P3DC1
OERR
OERR
TRMT
TRMT
TUN1
Bit 1
WR
PSS1BD0
PSS2BD0
PSS3BD0
CCP1M0
CCP2M0
CCP3M0
CCP3IP
CCP3IE
CCP2IP
CCP2IE
TMR1IP
TMR1IF
TMR1IE
CCP3IF
CCP2IF
P1DC0
P2DC0
P3DC0
RX9D
RX9D
TUN0
TX9D
TX9D
Bit 0
—
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
0000 0000
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
0000 0000
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
0000 0000
0000 0000
0000 0000
xxxx xxxx
0000 0010
0000 000x
0000 0000
0000 0000
0000 0000
0000 0010
---- ----
--00 x00-
1111 1111
0000 0000
0000 0000
1111 1111
0000 0000
0000 0000
1111 1111
0000 0000
0000 0000
0000 000x
0000 0000
DS39775C-page 85
POR, BOR
Value on
63, 291,
63, 289,
63, 291,
63, 289,
63, 232
63, 232
63, 232
63, 232
63, 232
63, 232
63, 232
63, 232
63, 232
63, 232
63, 232
63, 232
63, 232
63, 232
63, 232
63, 283
63, 289
63, 291
63, 283
63, 289
64, 132
64, 126
64, 129
64, 132
64, 126
64, 129
64, 132
64, 126
64, 129
64, 291
Details
63, 98
63, 98
64, 39
Page:
292
290
292
290
on