PIC18F86J50T-I/PT Microchip Technology, PIC18F86J50T-I/PT Datasheet - Page 211

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PIC18F86J50T-I/PT

Manufacturer Part Number
PIC18F86J50T-I/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets

Specifications of PIC18F86J50T-I/PT

Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
65
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3904 B
Interface Type
I2C, MSSP, SPI, EUSART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
65
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183022, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162087 - HEADER MPLAB ICD2 18F87J50 68/84MA180021 - MODULE PLUG-IN 18F87J50 FS USBAC164328 - MODULE SKT FOR 80TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
PIC18F86J50T-I/PTTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F86J50T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
17.2
In Capture mode, the CCPRxH:CCPRxL register pair
captures the 16-bit value of the TMR1 or TMR3
registers when an event occurs on the corresponding
CCPx pin. An event is defined as one of the following:
• every falling edge
• every rising edge
• every 4th rising edge
• every 16th rising edge
The event is selected by the mode select bits,
CCPxM3:CCPxM0 (CCPxCON<3:0>). When a capture
is made, the interrupt request flag bit, CCPxIF, is set; it
must be cleared in software. If another capture occurs
before the value in register CCPRx is read, the old
captured value is overwritten by the new captured value.
17.2.1
In Capture mode, the appropriate CCPx pin should be
configured as an input by setting the corresponding
TRIS direction bit.
17.2.2
The timers that are to be used with the capture feature
(Timer1 and/or Timer3) must be running in Timer mode or
Synchronized Counter mode. In Asynchronous Counter
mode, the capture operation will not work. The timer to be
used with each CCP module is selected in the T3CON
register (see Section 17.1.1 “CCP Modules and Timer
Resources”).
FIGURE 17-2:
© 2009 Microchip Technology Inc.
Note:
Capture Mode
CCPx PIN CONFIGURATION
If RG4/CCP5 is configured as an output, a
write to the port can cause a capture
condition.
TIMER1/TIMER3 MODE SELECTION
CCP4 pin
CCP5 pin
CAPTURE MODE OPERATION BLOCK DIAGRAM
CCP4CON<3:0>
CCP5CON<3:0>
Prescaler
÷ 1, 4, 16
Prescaler
÷ 1, 4, 16
Q1:Q4
4
Edge Detect
Edge Detect
4
4
and
and
Set CCP5IF
Set CCP4IF
T3CCP1
T3CCP2
T3CCP2
T3CCP1
T3CCP2
T3CCP2
PIC18F87J50 FAMILY
17.2.3
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep the
CCPxIE interrupt enable bit clear to avoid false
interrupts. The interrupt flag bit, CCPxIF, should also be
cleared following any such change in operating mode.
17.2.4
There are four prescaler settings in Capture mode.
They are specified as part of the operating mode
selected by the mode select bits (CCPxM3:CCPxM0).
Whenever the CCPx module is turned off or Capture
mode is disabled, the prescaler counter is cleared. This
means that any Reset will clear the prescaler counter.
Switching from one capture prescaler to another may
generate an interrupt. Also, the prescaler counter will
not be cleared; therefore, the first capture may be from
a non-zero prescaler. Example 17-1 shows the
recommended method for switching between capture
prescalers. This example also clears the prescaler
counter and will not generate the “false” interrupt.
EXAMPLE 17-1:
CLRF
MOVLW
MOVWF
CCP5CON
NEW_CAPT_PS
CCP5CON
SOFTWARE INTERRUPT
CCP PRESCALER
TMR3
Enable
TMR1
Enable
TMR3
Enable
TMR1
Enable
CCPR4H
CCPR5H
TMR1H
TMR3H
TMR3H
TMR1H
CHANGING BETWEEN
CAPTURE PRESCALERS
(CCP5 SHOWN)
; Load WREG with the
; Turn CCP module off
; new prescaler mode
; value and CCP ON
; Load CCP5CON with
; this value
CCPR4L
CCPR5L
TMR3L
TMR1L
TMR3L
TMR1L
DS39775C-page 211

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