PIC18F86J50T-I/PT Microchip Technology, PIC18F86J50T-I/PT Datasheet - Page 435

• Manufacturer Part Number: PIC18F86J50T-I/PT
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F86J50T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 65
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3904 B
• Interface Type: I2C, MSSP, SPI, EUSART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 65
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183022, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162087 - HEADER MPLAB ICD2 18F87J50 68/84MA180021 - MODULE PLUG-IN 18F87J50 FS USBAC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18F86J50T-I/PTTR

28.4
28.4.1
The timing parameter symbols have been created
following one of the following formats:
© 2009 Microchip Technology Inc.
1. TppS2ppS
2. TppS
T
Lowercase letters (pp) and their meanings:
pp
Uppercase letters and their meanings:
S
I
T
CC
ST
2
CC
C only
F
cc
ck
cs
di
do
dt
io
mc
F
H
I
L
AA
BUF
:
HD
DAT
STA
ST
(I
AC (Timing) Characteristics
2
C specifications only)
TIMING PARAMETER SYMBOLOGY
Frequency
SDI
SDO
Data in
I/O port
Fall
High
Invalid (High-impedance)
Low
output access
Bus free
DATA input hold
CCP1
CLKO
CS
MCLR
Hold
Start condition
3. T
4. Ts
PIC18F87J50 FAMILY
CC
T
osc
rd
rw
sc
ss
t0
t1
wr
P
R
V
Z
High
Low
SU
STO
:
ST
(I
(I
Time
OSC1
RD
RD or WR
SCK
SS
T0CKI
T13CKI
WR
Period
Rise
Valid
High-impedance
High
Low
Setup
Stop condition
2
2
C specifications only)
C specifications only)
DS39775C-page 435