PIC18F86J50T-I/PT Microchip Technology, PIC18F86J50T-I/PT Datasheet - Page 445

• Manufacturer Part Number: PIC18F86J50T-I/PT
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F86J50T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 65
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3904 B
• Interface Type: I2C, MSSP, SPI, EUSART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 65
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183022, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162087 - HEADER MPLAB ICD2 18F87J50 68/84MA180021 - MODULE PLUG-IN 18F87J50 FS USBAC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18F86J50T-I/PTTR

FIGURE 28-11:
TABLE 28-16: PARALLEL MASTER PORT READ TIMING REQUIREMENTS
© 2009 Microchip Technology Inc.
Param.
PM1
PM2
PM3
PM5
PM6
PM7
Operating Conditions: 2.0V < V
System
Clock
PMA<13:18>
PMD<7:0>
PMRD
PMWR
PMALL/PMALH
PMCS<2:1>
No
Symbol
PMALL/PMALH Pulse Width
Address Out Valid to PMALL/PMALH
Invalid (address setup time)
PMALL/PMALH Invalid to Address Out
Invalid (address hold time)
PMRD Pulse Width
PMRD or PMENB Active to Data In Valid
(data setup time)
PMRD or PMENB Inactive to Data In Invalid
(data hold time)
Q1
PARALLEL MASTER PORT READ TIMING DIAGRAM
PM2
DD
Address<7:0>
Q2
< 3.6V, -40°C < T
PM1
Characteristics
Q3
Address
A
PM3
Q4
< +85°C unless otherwise stated.
Q1
PIC18F87J50 FAMILY
PM6
Q2
Min
—
—
—
—
—
—
Q3
PM5
0.75 T
0.25 T
PM7
0.5 T
0.5 T
Data
Typ
—
—
Q4
CY
CY
CY
CY
Q1
DS39775C-page 445
Max
—
—
—
—
—
—
Q2
Units
ns
ns
ns
ns
ns
ns