PIC18F86J50T-I/PT Microchip Technology, PIC18F86J50T-I/PT Datasheet - Page 36

• Manufacturer Part Number: PIC18F86J50T-I/PT
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F86J50T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 65
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3904 B
• Interface Type: I2C, MSSP, SPI, EUSART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 65
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183022, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162087 - HEADER MPLAB ICD2 18F87J50 68/84MA180021 - MODULE PLUG-IN 18F87J50 FS USBAC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18F86J50T-I/PTTR

PIC18F87J50 FAMILY
2.2.1
Because of the unique requirements of the USB module,
a different approach to clock operation is necessary. In
order to use the USB module, a fixed 6 MHz or 48 MHz
clock must be internally provided to the USB module for
operation in either Low-Speed or Full-Speed mode,
respectively. The microcontroller core need not be
clocked at the same frequency as the USB module.
FIGURE 2-1:
DS39775C-page 36
T1OSO
Note 1:
T1OSI
OSC2
OSC1
2:
3:
4:
Secondary Oscillator
OSCILLATOR MODES AND
USB OPERATION
Primary Oscillator
The PLL requires a 4 MHz input and it produces a 96 MHz output. The PLL will not be available until the PLLEN bit
in the OSCTUNE register is set. Once the PLLEN bit is set, the PLL requires up to 2 ms to lock.
In order to use the USB module in Full-Speed mode, this node must be run at 48 MHz. For Low-Speed mode, this
node may be run at either 48 MHz or 24 MHz, but the CPDIV bits must be set such that the USB module is clocked
at 6 MHz.
Selecting the Timer1 clock or postscaled internal clock will turn off the primary oscillator (unless required by the
reference clock of Section 2.5 “Reference Clock Output”) and PLL.
The USB module cannot be used to communicate unless the primary clock source is selected.
Oscillator
Internal
PIC18F87J50 FAMILY CLOCK DIAGRAM
INTRC
31 kHz
8 MHz
Block
T1OSCEN
8 MHz
FOSC2
1
0
PLLEN
1
0
1
0
PLLDIV2:PLLDIV0
500 kHz
250 kHz
125 kHz
÷ 12
÷ 10
31 kHz
8 MHz
4 MHz
2 MHz
1 MHz
÷ 6
÷ 5
÷ 4
÷ 3
÷ 2
÷ 1
OSCCON<6:4>
000
001
010
011
100
101
110
111
OSCTUNE<7>
111
110
101
100
011
010
001
000
CPDIV1:CPDIV0
÷ 6
÷ 3
÷ 2
÷ 1
4 MHz
(Note 2)
A network of MUXes, clock dividers and a fixed 96 MHz
output PLL have been provided which can be used to
derive various microcontroller core and USB module
frequencies.
PIC18F87J50 family of devices is best understood by
referring to Figure 2-1.
00
01
10
11
96 MHz
PLL
Postscaled
Internal Clock
FOSC2:FOSC1
(1)
Timer1 Clock
00
÷ 2
The
Primary Clock
Source
OSCCON<1:0>
48 MHz
(3)
(4)
00
01
11
÷ 8
÷ 4
oscillator
CPDIV1:CPDIV0
© 2009 Microchip Technology Inc.
Enabled Modes
10
11
WDT, PWRT, FSCM
and Two-Speed Start-up
Peripherals
CLKO
IDLE
FSEN
1
0
structure
CPU
USB Module
Clock
Needs 48 MHz for FS
Needs 6 MHz for LS
÷ 4
RA6
of
the