PIC18F86J50T-I/PT Microchip Technology, PIC18F86J50T-I/PT Datasheet - Page 465

no-image

PIC18F86J50T-I/PT

Manufacturer Part Number
PIC18F86J50T-I/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets

Specifications of PIC18F86J50T-I/PT

Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
65
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3904 B
Interface Type
I2C, MSSP, SPI, EUSART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
65
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183022, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162087 - HEADER MPLAB ICD2 18F87J50 68/84MA180021 - MODULE PLUG-IN 18F87J50 FS USBAC164328 - MODULE SKT FOR 80TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
PIC18F86J50T-I/PTTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F86J50T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
INDEX
A
A/D ................................................................................... 301
Absolute Maximum Ratings ............................................. 419
AC (Timing) Characteristics ............................................. 435
ACKSTAT ........................................................................ 269
ACKSTAT Status Flag ..................................................... 269
ADCAL Bit ........................................................................ 309
ADCON0 Register
ADDFSR .......................................................................... 408
ADDLW ............................................................................ 371
ADDULNK ........................................................................ 408
ADDWF ............................................................................ 371
ADDWFC ......................................................................... 372
ADRESL Register ............................................................ 304
Analog-to-Digital Converter. See A/D.
ANDLW ............................................................................ 372
ANDWF ............................................................................ 373
Assembler
Auto-Wake-up on Sync Break Character ......................... 292
B
Baud Rate Generator ....................................................... 265
BC .................................................................................... 373
BCF .................................................................................. 374
BF .................................................................................... 269
BF Status Flag ................................................................. 269
Block Diagrams
© 2009 Microchip Technology Inc.
A/D Converter Interrupt, Configuring ....................... 305
Acquisition Requirements ........................................ 306
ADCAL Bit ................................................................ 309
ADRESH Register .................................................... 304
Analog Port Pins, Configuring .................................. 307
Associated Registers ............................................... 310
Automatic Acquisition Time ...................................... 307
Calibration ................................................................ 309
Configuring the Module ............................................ 305
Conversion Clock (T
Conversion Requirements ....................................... 457
Conversion Status (GO/DONE Bit) .......................... 304
Conversions ............................................................. 308
Converter Characteristics ........................................ 456
Operation in Power-Managed Modes ...................... 309
Special Event Trigger (ECCP) ......................... 220, 308
Use of the ECCP2 Trigger ....................................... 308
Load Conditions for Device Timing Specifications ... 436
Parameter Symbology ............................................. 435
Temperature and Voltage Specifications ................. 436
Timing Conditions .................................................... 436
GO/DONE Bit ........................................................... 304
MPASM Assembler .................................................. 416
16-Bit Byte Select Mode .......................................... 113
16-Bit Byte Write Mode ............................................ 111
16-Bit Word Write Mode ........................................... 112
8-Bit Multiplexed Address and Data Application ...... 188
8-Bit Multiplexed Modes ........................................... 115
A/D ........................................................................... 304
Analog Input Model .................................................. 305
Baud Rate Generator ............................................... 265
Capture Mode Operation ......................................... 211
Comparator Analog Input Model .............................. 340
Comparator Configurations ...................................... 342
Comparator Output .................................................. 337
Comparator Voltage Reference ............................... 345
AD
) ........................................... 307
PIC18F87J50 FAMILY
BN .................................................................................... 374
BNC ................................................................................. 375
BNN ................................................................................. 375
BNOV .............................................................................. 376
BNZ ................................................................................. 376
BOR. See Brown-out Reset.
BOV ................................................................................. 379
BRA ................................................................................. 377
Break Character (12-Bit) Transmit and Receive .............. 294
BRG. See Baud Rate Generator.
Brown-out Reset (BOR) ..................................................... 57
Comparator Voltage Reference Output Buffer Example
Compare Mode Operation ....................................... 212
Connections for On-Chip Voltage Regulator ........... 360
Demultiplexed Addressing Mode ............................. 181
Device Clock .............................................................. 36
Enhanced PWM ....................................................... 221
EUSART Transmit ................................................... 289
EUSARTx Receive .................................................. 291
External Power-on Reset Circuit (Slow V
Fail-Safe Clock Monitor ........................................... 362
Fully Multiplexed Addressing Mode ......................... 181
Generic I/O Port Operation ...................................... 137
Interrupt Logic .......................................................... 122
LCD Control ............................................................. 189
Legacy Parallel Slave Port ...................................... 175
MSSP (I
MSSP (SPI Mode) ................................................... 233
MSSPx (I
Multiplexed Addressing Application ......................... 188
On-Chip Reset Circuit ................................................ 55
Parallel EEPROM (Up to 15-Bit Address, 16-Bit Data) .
Parallel EEPROM (Up to 15-Bit Address, 8-Bit Data) ...
Parallel Master/Slave Connection Addressed Buffer 178
Parallel Master/Slave Connection Buffered ............. 177
Partially Multiplexed Addressing Application ........... 188
Partially Multiplexed Addressing Mode .................... 181
PIC18F6XJ5X (64-Pin) .............................................. 12
PIC18F8XJ5X (80-Pin) .............................................. 13
PMP Module ............................................................ 167
PWM Operation (Simplified) .................................... 214
Reads From Flash Program Memory ...................... 101
Single Comparator ................................................... 340
Table Read Operation ............................................... 97
Table Write Operation ............................................... 98
Table Writes to Flash Program Memory .................. 103
Timer0 in 16-Bit Mode ............................................. 192
Timer0 in 8-Bit Mode ............................................... 192
Timer1 ..................................................................... 196
Timer1 (16-Bit Read/Write Mode) ............................ 196
Timer2 ..................................................................... 202
Timer3 ..................................................................... 204
Timer3 (16-Bit Read/Write Mode) ............................ 204
Timer4 ..................................................................... 208
USB Interrupt Logic ................................................. 325
USB Peripheral and Options ................................... 311
Using the Open-Drain Output .................................. 138
Watchdog Timer ...................................................... 358
and On-Chip Voltage Regulator .............................. 361
347
57
189
189
2
C Mode) .................................................... 243
2
C Master Mode) ...................................... 263
DS39775C-page 465
DD
Power-up)

Related parts for PIC18F86J50T-I/PT