PIC18F86J50T-I/PT Microchip Technology, PIC18F86J50T-I/PT Datasheet - Page 466

• Manufacturer Part Number: PIC18F86J50T-I/PT
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F86J50T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 65
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3904 B
• Interface Type: I2C, MSSP, SPI, EUSART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 65
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183022, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162087 - HEADER MPLAB ICD2 18F87J50 68/84MA180021 - MODULE PLUG-IN 18F87J50 FS USBAC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18F86J50T-I/PTTR

PIC18F87J50 FAMILY
BSF .................................................................................. 377
BTFSC ............................................................................. 378
BTFSS .............................................................................. 378
BTG .................................................................................. 379
BZ ..................................................................................... 380
C
C Compilers
Calibration (A/D Converter) .............................................. 309
CALL ................................................................................ 380
CALLW ............................................................................. 409
Capture (CCP Module) ..................................................... 211
Capture (ECCP Module) .................................................. 220
Capture/Compare/PWM (CCP) ........................................ 209
Clock Sources .................................................................... 42
CLRF ................................................................................ 381
CLRWDT .......................................................................... 381
Code Examples
Code Protection ............................................................... 349
DS39775C-page 466
Detecting .................................................................... 57
Disabling in Sleep Mode ............................................ 57
MPLAB C18 ............................................................. 416
MPLAB C30 ............................................................. 416
Associated Registers ............................................... 213
CCPRxH:CCPRxL Registers ................................... 211
CCPx Pin Configuration ........................................... 211
Prescaler .................................................................. 211
Software Interrupt .................................................... 211
Timer1/Timer3 Mode Selection ................................ 211
Capture Mode. See Capture.
CCP Mode and Timer Resources ............................ 210
CCPRxH Register .................................................... 210
CCPRxL Register ..................................................... 210
Compare Mode. See Compare.
ECCP/CCP Timer Interconnect Configurations ....... 210
Module Configuration ............................................... 210
Effects of Power-Managed Modes ............................. 46
Selecting the 31 kHz Source ...................................... 42
Selection Using OSCCON Register ........................... 42
16 x 16 Signed Multiply Routine .............................. 120
16 x 16 Unsigned Multiply Routine .......................... 120
8 x 8 Signed Multiply Routine .................................. 119
8 x 8 Unsigned Multiply Routine .............................. 119
A/D Calibration Routine ........................................... 309
Changing Between Capture Prescalers ................... 211
Computed GOTO Using an Offset Value ................... 75
Erasing a Flash Program Memory Row ................... 102
Fast Register Stack .................................................... 75
How to Clear RAM (Bank 1) Using Indirect Addressing .
Implementing a Real-Time Clock Using a Timer1 Inter-
Initializing PORTA .................................................... 140
Initializing PORTB .................................................... 143
Initializing PORTC .................................................... 146
Initializing PORTD .................................................... 149
Initializing PORTE .................................................... 152
Initializing PORTF .................................................... 155
Initializing PORTG ................................................... 158
Initializing PORTH .................................................... 161
Initializing PORTJ .................................................... 164
Loading the SSP1BUF (SSP1SR) Register ............. 236
Reading a Flash Program Memory Word ................ 101
Saving STATUS, WREG and BSR Registers in RAM ...
Writing to Flash Program Memory ........................... 104
90
rupt Service ...................................................... 199
136
COMF .............................................................................. 382
Comparator ...................................................................... 337
Comparator Specifications ............................................... 433
Comparator Voltage Reference ....................................... 345
Compare (CCP Module) .................................................. 212
Compare (ECCP Module) ................................................ 220
Computed GOTO ............................................................... 75
Configuration Bits ............................................................ 349
Configuration Mismatch (CM) Reset .................................. 57
Configuration Register Protection .................................... 364
Core Features
CPFSEQ .......................................................................... 382
CPFSGT .......................................................................... 383
CPFSLT ........................................................................... 383
Crystal Oscillator/Ceramic Resonator ................................ 37
Customer Change Notification Service ............................ 477
Customer Notification Service ......................................... 477
Customer Support ............................................................ 477
D
Data Addressing Modes .................................................... 90
Data Memory ..................................................................... 78
Analog Input Connection Considerations ................ 340
Associated Registers ............................................... 344
Configuration ........................................................... 341
Control ..................................................................... 341
Effects of a Reset .................................................... 344
Enable and Input Selection ...................................... 341
Enable and Output Selection ................................... 341
Interrupts ................................................................. 343
Operation ................................................................. 340
Operation During Sleep ........................................... 344
Response Time ........................................................ 340
Accuracy and Error .................................................. 347
Associated Registers ............................................... 347
Configuring .............................................................. 346
Connection Considerations ...................................... 347
Effects of a Reset .................................................... 347
Operation During Sleep ........................................... 347
Associated Registers ............................................... 213
CCPRx Register ...................................................... 212
Pin Configuration ..................................................... 212
Software Interrupt .................................................... 212
Timer1/Timer3 Mode Selection ................................ 212
Special Event Trigger .............................. 205, 220, 308
Easy Migration ........................................................... 10
Expanded Memory ....................................................... 9
Extended Instruction Set ........................................... 10
External Memory Bus ................................................ 10
nanoWatt Technology .................................................. 9
Oscillator Options and Features .................................. 9
Universal Serial Bus (USB) .......................................... 9
Comparing Addressing Modes with the Extended In-
Direct ......................................................................... 90
Indexed Literal Offset ................................................ 93
Indirect ....................................................................... 90
Inherent and Literal .................................................... 90
Access Bank .............................................................. 80
Bank Select Register (BSR) ...................................... 78
Extended Instruction Set ........................................... 93
General Purpose Registers ....................................... 80
Memory Maps
struction Set Enabled ........................................ 94
BSR ................................................................... 95
Instructions Affected .......................................... 93
Mapping Access Bank ....................................... 95
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