PIC18F86J50T-I/PT Microchip Technology, PIC18F86J50T-I/PT Datasheet - Page 472

• Manufacturer Part Number: PIC18F86J50T-I/PT
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F86J50T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 65
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3904 B
• Interface Type: I2C, MSSP, SPI, EUSART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 65
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183022, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162087 - HEADER MPLAB ICD2 18F87J50 68/84MA180021 - MODULE PLUG-IN 18F87J50 FS USBAC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18F86J50T-I/PTTR

PIC18F87J50 FAMILY
RESET ............................................................................. 395
Reset .................................................................................. 55
DS39775C-page 472
CONFIG1L (Configuration 1 Low) ............................ 351
CONFIG2H (Configuration 2 High) .......................... 354
CONFIG3H (Configuration 3 High) .......................... 356
CONFIG3L (Configuration 3 Low) ...................... 71, 355
CVRCON (Comparator Voltage Reference Control) 346
DEVID1 (Device ID 1) .............................................. 357
DEVID2 (Device ID 2) .............................................. 357
ECCPxAS (ECCPx Auto-Shutdown Control) ........... 229
ECCPxDEL (ECCPx PWM Delay) ........................... 228
EECON1 (EEPROM Control 1) .................................. 99
INTCON (Interrupt Control) ...................................... 123
INTCON2 (Interrupt Control 2) ................................. 124
INTCON3 (Interrupt Control 3) ................................. 125
IPR1 (Peripheral Interrupt Priority 1) ........................ 132
IPR2 (Peripheral Interrupt Priority 2) ........................ 133
IPR3 (Peripheral Interrupt Priority 3) ........................ 134
MEMCON (External Memory Bus Control) .............. 108
ODCON1 (Peripheral Open-Drain Control 1) ........... 139
ODCON2 (Peripheral Open-Drain Control 2) ........... 139
ODCON3 (Peripheral Open-Drain Control 3) ........... 139
OSCCON (Oscillator Control) .................................... 44
OSCTUNE (Oscillator Tuning) ................................... 40
PADCFG1 (Pad Configuration Control 1) ................ 140
PIE1 (Peripheral Interrupt Enable 1) ........................ 129
PIE2 (Peripheral Interrupt Enable 2) ........................ 130
PIE3 (Peripheral Interrupt Enable 3) ........................ 131
PIR1 (Peripheral Interrupt Request (Flag) 1) ........... 126
PIR2 (Peripheral Interrupt Request (Flag) 2) ........... 127
PIR3 (Peripheral Interrupt Request (Flag) 3) ........... 128
PMADDRH (Parallel Port Address High Byte) ......... 174
PMCONH (Parallel Port Control High Byte) ............. 168
PMCONL (Parallel Port Control Low Byte) .............. 169
PMEH (Parallel Port Enable High Byte) ................... 171
PMEL (Parallel Port Enable Low Byte) .................... 172
PMMODEH (Parallel Port Mode High Byte) ............. 170
PMMODEL (Parallel Port Mode Low Byte) .............. 171
PMSTATH (Parallel Port Status High Byte) ............. 172
PMSTATL (Parallel Port Status Low Byte) .............. 173
RCON (Reset Control) ....................................... 56, 135
RCSTAx (Receive Status and Control) .................... 281
SSPxCON1 (MSSPx Control 1, I
SSPxCON1 (MSSPx Control 1, SPI Mode) ............. 235
SSPxMSK (I
SSPxSTAT (MSSPx Status, I
SSPxSTAT (MSSPx Status, SPI Mode) .................. 234
STATUS ..................................................................... 89
STKPTR (Stack Pointer) ............................................ 74
T0CON (Timer0 Control) .......................................... 191
T1CON (Timer1 Control) .......................................... 195
T2CON (Timer2 Control) .......................................... 201
T3CON (Timer3 Control) .......................................... 203
T4CON (Timer4 Control) .......................................... 207
TXSTAx (Transmit Status and Control) ................... 280
UCFG (USB Configuration) ...................................... 314
UCON (USB Control) ............................................... 312
UEIE (USB Error Interrupt Enable) .......................... 330
UEIR (USB Error Interrupt Status) ........................... 329
UEPn (USB Endpoint n Control) .............................. 317
UIE (USB Interrupt Enable) ...................................... 328
UIR (USB Interrupt Status) ...................................... 326
USTAT (USB Status) ............................................... 316
WDTCON (Watchdog Timer Control) ....................... 359
Brown-out Reset (BOR) ............................................. 55
2
C Slave Address Mask) ...................... 247
2
C Mode) ................... 244
2
C Mode) .............. 245
Resets .............................................................................. 349
RETFIE ............................................................................ 396
RETLW ............................................................................ 396
RETURN .......................................................................... 397
Revision History ............................................................... 463
RLCF ............................................................................... 397
RLNCF ............................................................................. 398
RRCF ............................................................................... 398
RRNCF ............................................................................ 399
S
SCKx ................................................................................ 233
SDIx ................................................................................. 233
SDOx ............................................................................... 233
SEC_IDLE Mode ............................................................... 52
SEC_RUN Mode ................................................................ 48
Serial Clock, SCKx .......................................................... 233
Serial Data In (SDIx) ........................................................ 233
Serial Data Out (SDOx) ................................................... 233
Serial Peripheral Interface. See SPI Mode.
SETF ................................................................................ 399
Slave Select (SSx) ........................................................... 233
SLEEP ............................................................................. 400
Software Simulator (MPLAB SIM) ................................... 416
Special Event Trigger. See Compare (ECCP Module).
Special Features of the CPU ........................................... 349
Special Function Registers
SPI Mode (MSSP) ........................................................... 233
SSPOV ............................................................................ 269
SSPOV Status Flag ......................................................... 269
SSPxSTAT Register
SSx .................................................................................. 233
Stack Full/Underflow Resets .............................................. 75
SUBFSR .......................................................................... 411
MCLR Reset, During Power-Managed Modes .......... 55
MCLR Reset, Normal Operation ................................ 55
Power-on Reset (POR) .............................................. 55
RESET Instruction ..................................................... 55
Stack Full Reset ......................................................... 55
Stack Underflow Reset .............................................. 55
Watchdog Timer (WDT) Reset .................................. 55
Brown-out Reset (BOR) ........................................... 349
Oscillator Start-up Timer (OST) ............................... 349
Power-on Reset (POR) ............................................ 349
Power-up Timer (PWRT) ......................................... 349
Shared Registers ....................................................... 82
Associated Registers ............................................... 242
Bus Mode Compatibility ........................................... 241
Clock Speed, Interactions ........................................ 241
Effects of a Reset .................................................... 241
Enabling SPI I/O ...................................................... 237
Master Mode ............................................................ 238
Master/Slave Connection ......................................... 237
Operation ................................................................. 236
Operation in Power-Managed Modes ...................... 241
Serial Clock .............................................................. 233
Serial Data In ........................................................... 233
Serial Data Out ........................................................ 233
Slave Mode .............................................................. 239
Slave Select ............................................................. 233
Slave Select Synchronization .................................. 239
SPI Clock ................................................................. 238
SSPxBUF Register .................................................. 238
SSPxSR Register .................................................... 238
Typical Connection .................................................. 237
R/W Bit ............................................................ 248, 251
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