PIC18F86J50T-I/PT Microchip Technology, PIC18F86J50T-I/PT Datasheet

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PIC18F86J50T-I/PT

Manufacturer Part Number
PIC18F86J50T-I/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets

Specifications of PIC18F86J50T-I/PT

Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
65
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3904 B
Interface Type
I2C, MSSP, SPI, EUSART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
65
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183022, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162087 - HEADER MPLAB ICD2 18F87J50 68/84MA180021 - MODULE PLUG-IN 18F87J50 FS USBAC164328 - MODULE SKT FOR 80TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
PIC18F86J50T-I/PTTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F86J50T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
The PIC18F87J50 family devices that you have received
conform functionally to the current Device Data Sheet
(DS39775B), except for the anomalies described in this
document.
The silicon issues discussed in the following pages are
for silicon revisions with the Device and Revision IDs
listed in Table 1. The silicon issues are summarized in
Table 2.
The errata described in this document will be addressed
in future revisions of the PIC18F87J50 family silicon.
Data Sheet clarifications and corrections start on page 5,
following the discussion of silicon issues.
The silicon revision level can be identified using the
current version of MPLAB
programmers, debuggers, and emulation tools, which
are available at the Microchip corporate web site
(www.microchip.com).
TABLE 1:
© 2009 Microchip Technology Inc.
PIC18F65J50
PIC18F66J50
PIC18F66J55
PIC18F67J50
PIC18F85J50
PIC18F86J50
PIC18F86J55
PIC18F87J50
Note 1:
Note:
2:
Part Number
The Device IDs (DEVID and DEVREV) are located at the last two implemented addresses of configuration
memory space. They are shown in hexadecimal in the format “DEVID DEVREV”.
Refer to the “PIC18F6XJXX/8XJXX Family Flash Microcontroller Programming Specification” (DS39644)
for detailed information on Device and Revision IDs for your specific device.
This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated in the last column of
Table 2 apply to the current silicon revision
(A4).
SILICON DEVREV VALUES
Silicon Errata and Data Sheet Clarification
®
IDE and Microchip’s
Device ID
PIC18F87J50 Family
41AXh
41EXh
410Xh
414Xh
416Xh
418Xh
420Xh
422Xh
PIC18F87J50 FAMILY
(1)
For example, to identify the silicon revision level using
MPLAB IDE in conjunction with MPLAB ICD 2 or
PICkit™ 3:
1.
2.
3.
4.
The DEVREV values for the various PIC18F87J50
family silicon revisions are shown in Table 1.
A2
2h
Note:
Using the appropriate interface, connect the
device to the MPLAB ICD 2 programmer/
debugger or PICkit™ 3.
From the main menu in MPLAB IDE, select
Configure>Select Device, and then select the
target part number in the dialog box.
Select
(Debugger>Select Tool).
Perform a “Connect” operation to the device
(Debugger>Connect). Depending on the devel-
opment tool used, the part number and Device
Revision ID value appear in the Output window.
Revision ID for Silicon Revision
If you are unable to extract the silicon
revision level, please contact your local
Microchip sales office for assistance.
the
A3
3h
MPLAB
hardware
DS80481A-page 1
(2)
A4
3h
tool

Related parts for PIC18F86J50T-I/PT

PIC18F86J50T-I/PT Summary of contents

Page 1

... They are shown in hexadecimal in the format “DEVID DEVREV”. 2: Refer to the “PIC18F6XJXX/8XJXX Family Flash Microcontroller Programming Specification” (DS39644) for detailed information on Device and Revision IDs for your specific device. © 2009 Microchip Technology Inc. PIC18F87J50 FAMILY PIC18F87J50 Family For example, to identify the silicon revision level using MPLAB IDE in conjunction with MPLAB ICD 2 or PICkit™ ...

Page 2

... C Master mode, narrow clock width upon slave clock stretch If interrupts are enabled delay needed CY after re-enabling the module SPI master, write collision for F /64 and OSC Timer2/2 In certain cases, PMP can override RH0 and RH1 (1) Affected Revisions © 2009 Microchip Technology Inc. ...

Page 3

... Affected Silicon Revisions © 2009 Microchip Technology Inc. PIC18F87J50 FAMILY 2. Module: MSSP (I When in I clock stretching, the first clock pulse after the slave releases the SCL line may be narrower than the configured clock width. This may result in the slave missing the first clock in the next transmission/ reception ...

Page 4

... The RH0 and RH1 pins will function normally and can still be used as standard GPIO if the PMP is disabled or the PMPMX Configuration bit is set. This issue only applies to the 80-pin devices (PIC18F85J50, PIC18F86J50, PIC18F86J55 and PIC18F87J50). Work around None. Affected Silicon Revisions © 2009 Microchip Technology Inc. ...

Page 5

... Writes per Erase Cycle WE † Data in “Typ” column is at 3.3V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. © 2009 Microchip Technology Inc. PIC18F87J50 FAMILY 1. Module: Table 28-1: Memory Programming Requirements On page 430, parameter D132B is renamed, and ...

Page 6

... DD be used. Regulator Specifications Max Units Comments ±25 mV – 1 — dB 400 ns μs 10 — V Comments V , ENVREG = 3.0V DD Capacitor must be low series resistance (<5Ω) ). When the regulator is DD © 2009 Microchip Technology Inc. ...

Page 7

... Note 1: Negative current is defined as current sourced by the pin. 2: Refer to Table 10-1 for the pins that have corresponding tolerance limits. © 2009 Microchip Technology Inc. PIC18F87J50 FAMILY The changed content is indicated in bold text in the “DC CHARACTERISTICS” table. Standard Operating Conditions (unless otherwise stated) Operating temperature -40° ...

Page 8

... SSPxCON2 registers and select the mode prior to setting the SSPEN bit to enable the MSSP module. DS80481A-page Module: Figure 19-10: I C™ Slave Mode Timing (Transmission, 7-Bit Address) On page 252, the figure is replaced with the new timing diagram provided in Figure 19-10. © 2009 Microchip Technology Inc. ...

Page 9

... FIGURE 19-10: I C™ SLAVE MODE TIMING (TRANSMISSION, 7-BIT ADDRESS) © 2009 Microchip Technology Inc. PIC18F87J50 FAMILY DS80481A-page 9 ...

Page 10

... Waveform (Reception, 7-Bit Address) On page 269, the condition, R/W, when the Acknowl- edge signal (ACK) is received from the slave, after transmitting the address to the slave, is changed to ‘1’. The changed value is indicated in bold text in Figure 19-24. DS80481A-page 10 © 2009 Microchip Technology Inc. ...

Page 11

... FIGURE 19-24: I C™ MASTER MODE WAVEFORM (RECEPTION, 7-BIT ADDRESS) © 2009 Microchip Technology Inc. PIC18F87J50 FAMILY DS80481A-page 11 ...

Page 12

... TMR2 register to a known value when writing to SSPxBUF. An example procedure, which provides predictable bit widths (only needed in the Timer2/2 mode), is given in Example 2. The example procedure demon- strates operation with MSSP1, but the concepts apply equally to MSSP2. © 2009 Microchip Technology Inc. ...

Page 13

... SPI Master) and 9 (OSCTUNE Register). This document replaces these errata documents: • DS80321B, “PIC18F87J50 Family Rev. A2 Silicon Errata” • DS80415A, “PIC18F87J50 Family Rev. A3 Silicon Errata” • DS80409B, “PIC18F87J50 Family Data Sheet Errata” © 2009 Microchip Technology Inc. PIC18F87J50 FAMILY DS80481A-page 13 ...

Page 14

... PIC18F87J50 FAMILY NOTES: DS80481A-page 14 © 2009 Microchip Technology Inc. ...

Page 15

... REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 16

... Fax: 886-3-6578-370 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2009 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...

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