PIC18F86J50T-I/PT Microchip Technology, PIC18F86J50T-I/PT Datasheet - Page 440

• Manufacturer Part Number: PIC18F86J50T-I/PT
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F86J50T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 65
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3904 B
• Interface Type: I2C, MSSP, SPI, EUSART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 65
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183022, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162087 - HEADER MPLAB ICD2 18F87J50 68/84MA180021 - MODULE PLUG-IN 18F87J50 FS USBAC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18F86J50T-I/PTTR

PIC18F87J50 FAMILY
FIGURE 28-6:
TABLE 28-11: PROGRAM MEMORY READ TIMING REQUIREMENTS
DS39775C-page 440
150
151
155
160
161
162
163
164
165
166
167
168
169
171
171A
Param.
Operating Conditions: 2.0V < V
AD<15:0>
No
A<19:16>
OSC1
BA0
ALE
OE
CE
TadV2alL
TalL2adl
TalL2oeL
TadZ2oeL
ToeH2adD OE ↑ to AD Driven
TadV2oeH Least Significant Data Valid before OE ↑
ToeH2adl
TalH2alL
ToeL2oeH OE Pulse Width
TalH2alH
Tacc
Toe
TalL2oeH
TalH2csL
TubL2oeH AD Valid to Chip Enable Active
Symbol
Address Out Valid to ALE ↓
(address setup time)
ALE ↓ to Address Out Invalid
(address hold time)
ALE ↓ to OE ↓
AD high-Z to OE ↓ (bus release to OE)
(data setup time)
OE ↑ to Data In Invalid (data hold time)
ALE Pulse Width
ALE ↑ to ALE ↑ (cycle time)
Address Valid to Data Valid
OE ↓ to Data Valid
ALE ↓ to OE ↑
Chip Enable Active to ALE ↓
Q1
PROGRAM MEMORY READ TIMING DIAGRAM
DD
164
Address
< 3.6V, -40°C < T
150
151
Characteristics
171
171A
Q2
167
A
155
< +85°C unless otherwise stated.
160
Q3
Address
166
168
169
0.625 T
0.25 T
0.125 T
0.75 T
0.25 T
165
0.5 T
Data from External
Q4
Min
10
20
—
—
—
CY
CY
CY
CY
162
5
0
0
CY
163
CY
– 10
– 5
– 25
– 20
– 10
– 5
0.125 T
0.25 T
0.5 T
161
Typ
T
—
—
—
—
—
—
—
—
—
—
—
© 2009 Microchip Technology Inc.
CY
Q1
CY
CY
CY
0.625 T
0.5 T
Max
Address
Address
CY
10
—
—
—
—
—
—
—
—
—
—
—
—
CY
– 25
+ 10
Q2
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns