H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 657

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H8S-2350

Manufacturer Part Number
H8S-2350
Description
16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
[4] The receiving station carries out a parity check.
[5] If the transmitting station does not receive an error signal, it proceeds to transmit the next data
14.3.4
Table 14.3 shows a bit map of the registers used by the smart card interface.
Bits indicated as 0 or 1 must be set to the value shown. The setting of other bits is described
below.
Table 14.3 Smart Card Interface Register Settings
Notes: —: Unused bit.
Register
SMR
BRR
SCR
TDR
SSR
RDR
SCMR
If there is no parity error and the data is received normally, the receiving station waits for
reception of the next data.
If a parity error occurs, however, the receiving station outputs an error signal (DE, low-level)
to request retransmission of the data. After outputting the error signal for the prescribed length
of time, the receiving station places the signal line in the high-impedance state again. The
signal line is pulled high again by a pull-up resistor.
frame.
If it does receive an error signal, however, it returns to step [2] and retransmits the erroneous
data.
*: The CKE1 bit must be cleared to 0 when the GM bit in SMR is cleared to 0.
Register Settings
Bit 7
GM
BRR7
TIE
TDR7
TDRE
RDR7
Bit 6
0
BRR6
RIE
TDR6
RDRF
RDR6
Bit 5
1
BRR5
TE
TDR5
ORER
RDR5
Bit 4
O/E
BRR4
RE
TDR4
ERS
RDR4
Bit
BRR3
RDR3
Bit 3
1
0
TDR3
PER
SDIR
Rev. 3.00 Sep 15, 2006 page 623 of 988
Section 14 Smart Card Interface
Bit 2
0
BRR2
0
TDR2
TEND
RDR2
SINV
Bit 1
CKS1
BRR1
CKE1 *
TDR1
0
RDR1
REJ09B0330-0300
Bit 0
CKS0
BRR0
CKE0
TDR0
0
RDR0
SMIF

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