H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 543

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H8S-2350

Manufacturer Part Number
H8S-2350
Description
16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
11.2
11.2.1
NDERH and NDERL are 8-bit readable/writable registers that enable or disable pulse output on a
bit-by-bit basis.
If a bit is enabled for pulse output by NDERH or NDERL, the NDR value is automatically
transferred to the corresponding PODR bit when the TPU compare match event specified by PCR
occurs, updating the output value. If pulse output is disabled, the bit value is not transferred from
NDR to PODR and the output value does not change.
NDERH and NDERL are each initialized to H'00 by a reset and in hardware standby mode. They
are not initialized in software standby mode.
NDERH Bits 7 to 0—Next Data Enable 15 to 8 (NDER15 to NDER8): These bits enable or
disable pulse output on a bit-by-bit basis.
Bits 7 to 0
NDER15 to NDER8
0
1
NDERH
Bit
Initial value
R/W
NDERL
Bit
Initial value
R/W
Register Descriptions
Next Data Enable Registers H and L (NDERH, NDERL)
:
:
:
:
:
:
NDER15
NDER7
R/W
R/W
7
0
7
0
Description
Pulse outputs PO15 to PO8 are disabled (NDR15 to NDR8 are not
transferred to POD15 to POD8)
Pulse outputs PO15 to PO8 are enabled (NDR15 to NDR8 are transferred
to POD15 to POD8)
NDER14
NDER6
R/W
R/W
6
0
6
0
NDER13
NDER5
R/W
R/W
5
0
5
0
Section 11 Programmable Pulse Generator (PPG)
NDER12
NDER4
R/W
R/W
4
0
4
0
Rev. 3.00 Sep 15, 2006 page 509 of 988
NDER11
NDER3
R/W
R/W
3
0
3
0
NDER10
NDER2
R/W
R/W
2
0
2
0
NDER9
NDER1
R/W
R/W
REJ09B0330-0300
1
0
1
0
(Initial value)
NDER8
NDER0
R/W
R/W
0
0
0
0

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