H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 200

no-image

H8S-2350

Manufacturer Part Number
H8S-2350
Description
16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 6 Bus Controller
6.5.8
There are two ways of inserting wait states in a DRAM access cycle: program wait insertion and
pin wait insertion using the WAIT pin.
Figure 6.17 shows an example of wait state insertion timing.
Rev. 3.00 Sep 15, 2006 page 166 of 988
REJ09B0330-0300
Program Wait Insertion
When the bit in ASTCR corresponding to an area designated as DRAM space is set to 1, from
0 to 3 wait states can be inserted automatically between the T
the settings of WCRH and WCRL.
Pin Wait Insertion
When the WAITE bit in BCRH is set to 1, wait input by means of the WAIT pin is enabled
regardless of the setting of the AST bit in ASTCR. When DRAM space is accessed in this
state, a program wait is first inserted. If the WAIT pin is low at the falling edge of in the last
T
until it goes high.
c1
or T
Wait Control
w
state, another T
w
state is inserted. If the WAIT pin is held low, T
c1
state and T
c2
w
states are inserted
state, according to

Related parts for H8S-2350